I am working on PCI Express communication between Host PC and ZC706 board.
I have referred xtp246-zc706-pcie-c-2015-4 document and performed TRD available in this documnet. For better understanding of this TRD I have also referred pg054-7series-pcie document.
I would like to understand, how to access data from 7 Series FPGAs Integrated Block for PCI Express (Xilinx IP) configured as Endpoint through the host PC.
I would also like to know about "System Memory" in BAR configuration window of 7 Series FPGAs Intergated block for PCI Express.