UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor 40818041
Visitor
4,599 Views
Registered: ‎10-20-2013

Project XPS XILINX

Jump to solution

HI
I want to create a new project with XPS xilinx and I want to use the APU interface to create a high-speed data stream .
I use virtex-5-ml507-powerpc and Xilinx ISE Version 12.1 .
now ,I just have a simple VHDL code for trying
please, I need your help

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Adventurer
Adventurer
5,838 Views
Registered: ‎01-15-2013

Re: Project XPS XILINX

Jump to solution
0 Kudos
5 Replies
Highlighted
Adventurer
Adventurer
5,839 Views
Registered: ‎01-15-2013

Re: Project XPS XILINX

Jump to solution
0 Kudos
Visitor wajdifarhat
Visitor
4,567 Views
Registered: ‎09-26-2013

Re: Project XPS XILINX

Jump to solution

Hello everyone I worked on the MicroBlaze to validate an algorithm for image processing. I do a lot of different applications with Xilinx EDK and SDK example (LCD, LED etc. ...). Now, I'm an example for the active DVI to VGA display. Resuis I carctère to display on VGA screen. But to show a complete picture of the problems I find (in programming). please, can you give some example or idea and thank you I worked with Virtex 6. Very Sincerely.

0 Kudos
Visitor 40818041
Visitor
4,422 Views
Registered: ‎10-20-2013

Re: Project XPS XILINX

Jump to solution
thank you, I now learned the C language.
can you me give the steps to make a coprocesseur?, please .
cordially.
Tags (1)
0 Kudos
Adventurer
Adventurer
4,404 Views
Registered: ‎01-15-2013

Re: Project XPS XILINX

Jump to solution
hello,

40818041:
I have never done a design in powerpc but i have done using microblaze. in microblaze processor, xps allows to create a custom ip(inVHDL or verilog) which communicates to microblaze using AXi interface. in your case, i believe PLB is used to connect your IP with power PC.

wajdifarhat: i am sorry, i cannot understand you. make your question more clear and precise.
0 Kudos
Visitor 40818041
Visitor
4,398 Views
Registered: ‎10-20-2013

Re: Project XPS XILINX

Jump to solution

HI

I work on the environment XILINX .
I found a difficulty to do a (hardware accelerator) coprocessor.

The block that has been implemented in VHDL is the function √ (a ^ 2 + b ^ 2), 
We want to link this block with PowerPC processor card Xilinx ML507 through the APU / FCM interface.

I have the code in VHDL and C source code.

please help me through the steps necessary and details..
                              thank you for your attention

0 Kudos