10-20-2013 08:36 AM
HI
I want to create a new project with XPS xilinx and I want to use the APU interface to create a high-speed data stream .
I use virtex-5-ml507-powerpc and Xilinx ISE Version 12.1 .
now ,I just have a simple VHDL code for trying
please, I need your help
10-22-2013 09:27 AM
10-22-2013 09:27 AM
10-23-2013 12:27 PM
Hello everyone I worked on the MicroBlaze to validate an algorithm for image processing. I do a lot of different applications with Xilinx EDK and SDK example (LCD, LED etc. ...). Now, I'm an example for the active DVI to VGA display. Resuis I carctère to display on VGA screen. But to show a complete picture of the problems I find (in programming). please, can you give some example or idea and thank you I worked with Virtex 6. Very Sincerely.
02-03-2014 11:29 AM
02-03-2014 02:48 PM
02-04-2014 05:01 AM
HI
I work on the environment XILINX .
I found a difficulty to do a (hardware accelerator) coprocessor.
The block that has been implemented in VHDL is the function √ (a ^ 2 + b ^ 2),
We want to link this block with PowerPC processor card Xilinx ML507 through the APU / FCM interface.
I have the code in VHDL and C source code.
please help me through the steps necessary and details..
thank you for your attention