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Observer jhabril
Observer
8,474 Views
Registered: ‎10-29-2015

Restoring the GOLDEN FPGA Configuration for Virtex II Pro

Hi, i need to restore the GOLDEN FPGA Configuration for Virtex II Pro, and y need the file XUP_V2Pro_BIST.zip, where I can get it?

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9 Replies
Xilinx Employee
Xilinx Employee
8,466 Views
Registered: ‎07-11-2011

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@jhabril

 

Please check below link uilt-in-self-test (BIST) section and download the zip file

http://www.xilinx.com/univ/xupv2p.html

 

Here is the UG for it

http://www.xilinx.com/univ/XUPV2P/Documentation/ug069.pdf

 

Hope this helps

 

-Vanitha

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Observer jhabril
Observer
8,462 Views
Registered: ‎10-29-2015

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

I can't find  the file XUP_V2Pro_BIST.mcs, is it in the .zip file?

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Scholar pratham
Scholar
8,398 Views
Registered: ‎06-05-2013

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@jhabril Its not available there in the zip file. You have to create the .mcs using bit files. I have attached .mcs which can be used (i have created this one from the rev_a and rev_b bitstream downloaded from the zip) Hope .mcs attached would work.

-Pratham

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Observer jhabril
Observer
8,349 Views
Registered: ‎10-29-2015

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@No, it didn't work, i tried to generate the file, but i getting this (i'm using ISE 10.1 and Virtex-II  Pro, what should I use?):

 

Xilinx Platform Studio
Xilinx EDK 10.1 Build EDK_K.15
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.

XPS% Evaluating file C:\Xilinx\proyectos\restore\system.setprop.tcl
WARNING:MDT - Option "CORE_STATE" in
C:\Xilinx\proyectos\bist_rev_1_6\pcores\opb_ac97_v2_00_a\data\opb_ac97_v2_1_0
.mpd line 18 is deprecated. Please use Option ARCH_SUPPORT_MAP instead.
ERROR:MDT - IPNAME:plb_ddr INSTANCE:ddr_sdram -
C:\Xilinx\proyectos\bist_rev_1_6\system.mhs line 180 - PARAMETER C_DDR_TREFC
not found in mpd.
ERROR:MDT -
C:\Xilinx\proyectos\bist_rev_1_6\pcores\hw_bist_v1_01_d\data\hw_bist_v2_1_0.m
pd line 52 Invalid Signal name DIR=OUT
ERROR:MDT - Errors while parsing MPD file
C:\Xilinx\proyectos\bist_rev_1_6\pcores\hw_bist_v1_01_d\data\hw_bist_v2_1_0.m
pd
ERROR:MDT - C:\Xilinx\proyectos\bist_rev_1_6\system.mss line 114 - Can not find
MLD for the library xilnet 1.00.a
INFO:MDT - Directories Searched :
- C:\Xilinx\proyectos\bist_rev_1_6\sw_services/xilnet_v1_00_a/data
- C:\Xilinx\10.1\EDK\sw\ThirdParty\sw_services/xilnet_v1_00_a/data
- C:\Xilinx\10.1\EDK\sw\XilinxProcessorIPLib\sw_services/xilnet_v1_00_a/data
- C:\Xilinx\10.1\EDK\sw\lib\sw_services/xilnet_v1_00_a/data
ERROR:MDT - Can not find MLD for the library xilnet 1.00.a
INFO:MDT - Directories Searched :
- C:\Xilinx\proyectos\bist_rev_1_6\sw_services/xilnet_v1_00_a/data
- C:\Xilinx\10.1\EDK\sw\ThirdParty\sw_services/xilnet_v1_00_a/data
- C:\Xilinx\10.1\EDK\sw\XilinxProcessorIPLib\sw_services/xilnet_v1_00_a/data
- C:\Xilinx\10.1\EDK\sw\lib\sw_services/xilnet_v1_00_a/data
ERROR:MDT - while loading XMP file

Process "Updating XPS project device settings" failed

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Scholar pratham
Scholar
8,339 Views
Registered: ‎06-05-2013

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@jhabril What is the error message you got during flash programming? 

-Pratham

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Observer jhabril
Observer
8,336 Views
Registered: ‎10-29-2015

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@pratham I got it when ISE generateserror_mcs.png the mcs file, 

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Scholar pratham
Scholar
8,329 Views
Registered: ‎06-05-2013

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@jhabril You dont have to generate .mcs file. I have sent the .mcs file, can you program the flash using ise imapct tool? If you need any help programming flash let us know. If flash programming is failing please post the screenshot/log from the imapct here

-Pratham

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Observer jhabril
Observer
8,318 Views
Registered: ‎10-29-2015

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

@pratham Done, but the golden config doesn't work, no initial test, no video sound or anything, what can I do?

impact.png
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Observer jhabril
Observer
8,031 Views
Registered: ‎10-29-2015

Re: Restoring the GOLDEN FPGA Configuration for Virtex II Pro

Done, but the golden config doesn't work, no initial test, no video sound or anything, what can I do?

 

impact.png

 

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