11-28-2016 04:38 AM
I am integrating PCIe DMA BAR0 AXI Lite interface with AXI IIC IP in a Vivado 2016.3 Block design.
In the DMA IP side it is showing S_AXI_Lite port, but in AXI_IIC IP side, port is showing as S_AXI only.
The interface pins are compatible with AXI lite. I need to Know whether S_AXI ports follow AXI_Lite protocol.
Please note the marked section of the screenshot.
11-28-2016 10:27 AM
Yes AXI IIC supports Register access through AXI4-Lite interface and should work.
11-28-2016 08:36 PM
Iconnected both the IP's in block design. I am able to do read on default register values of AXI IIC IP, but unable to do a write operation with memtool. I am doing this write operation on a writable register only. What can be the possible reason?