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blooper
Visitor
Visitor
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Registered: ‎01-05-2015

Smart Splitter

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Hello,

 

I am looking to design a smart splitter and I don't have much experience with FPGA's. I want to be able to take a VGA signal in at a resolution i.e. 1440x1800 and split that signal to 2 outputs but splitting the signal into 1440x900 with a upper and lower image. 

Which FPGA would you recommend? 

Thank you in advance!

 

 

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gszakacs
Professor
Professor
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Registered: ‎08-14-2007

What you're proposing would be extremely simple if the timing of the original 1440 x 1800 video is such that you can pass half of it at a time to each monitor.  i.e. of you can get the monitor to accept the line and pixel rate of the original input video almost any FPGA could handle this.  However if you need to slow down the pixel and/or line rate to meet the monitor's timing requirements you will need to use an external frame buffer.  For that you need to determine the bandwidth requirements of the frame buffer and then you can decide which device will meet your needs.  Artix 7 will most likely do the job, but you need to pick a part with enough I/O's to handle the width of the external memory plus the input and output video signals.

-- Gabor

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muravin
Scholar
Scholar
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Registered: ‎11-21-2013
You can probably get away with Artix-7 very easily but ideally you need to detail what you are planning to do with this "smart splitter".
Vladislav Muravin
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athandr
Xilinx Employee
Xilinx Employee
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Registered: ‎07-31-2012

Hi,

 

You can write the code for your designn and run it in Vivado/ISE and then decide which device suits your requirement based on teh logic utilization. YOu can use the evaluation license to check this initially.

 

You can also get in touch with an FAE in your region who should help you with the device selection - http://www.xilinx.com/company/contact/index.htm

Thanks,
Anirudh

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blooper
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Registered: ‎01-05-2015

It would basically be pushing the top half of an image (1440x900) to a monitor and pushing the bottom half of an image (1440x900) to another monitor. I have no control over the incoming original signal that's why I need it to split the signal/resolution correctly.

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gszakacs
Professor
Professor
3,716 Views
Registered: ‎08-14-2007

What you're proposing would be extremely simple if the timing of the original 1440 x 1800 video is such that you can pass half of it at a time to each monitor.  i.e. of you can get the monitor to accept the line and pixel rate of the original input video almost any FPGA could handle this.  However if you need to slow down the pixel and/or line rate to meet the monitor's timing requirements you will need to use an external frame buffer.  For that you need to determine the bandwidth requirements of the frame buffer and then you can decide which device will meet your needs.  Artix 7 will most likely do the job, but you need to pick a part with enough I/O's to handle the width of the external memory plus the input and output video signals.

-- Gabor

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blooper
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Registered: ‎01-05-2015

Thank you Gabor. 

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