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Adventurer
Adventurer
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Registered: ‎08-29-2014

The TDO on SPARTAN6

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In a data sheet I read this:

 

TDO
changes state on the falling edge of TCK and is only active during the
shifting of instructions or data through the device. TDO is an active
driver output.

What does "is only active during the shifting of instructions or data" mean? Is it that 'TDO' is in "high-impedance" state, "tristate disabled", except during the shifting of instructions or data? 

 

/Staffan Cronstrom

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Adventurer
Adventurer
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Registered: ‎08-29-2014

Thank you.

The "FYI:" tells what I wanted to know.

View solution in original post

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Scholar
Scholar
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Registered: ‎02-27-2008

d,

 

Read the ANSI/IEEE JTAG standard and the Xilinx configuration users guide.

 

Yes, TDO may be tristate before the device is added to a chain, and may be placed in tristate for test.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Adventurer
Adventurer
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Registered: ‎08-29-2014

 

From Table 3-1 in Configutarion User Guide, Chapter 3: Boundary-Scan and JTAG Configuration :

 

Pin:

  TDO

Direction: 

  Out

Pre-Configuration Internal Pull Resistor: 

  Pull-up(1)

Description:

 

  Test Data Out. This pin is the serial output for all JTAG instruction and
  data registers.
  The state of the TAP controller and the current instruction determine the
  register (instruction or data) that feeds TDO for a specific operation. TDO
  changes state on the falling edge of TCK and is only active during the
  shifting of instructions or data through the device. TDO is an active
  driver output.

 

You write: "TDO may be tristate ... and may be placed in tristate...".

What do you mean? The "may"-s confuse me a little. What are the conditions for TDO to be tristate when instructions or data are not shifted through the device?

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Scholar
Scholar
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Registered: ‎02-27-2008

d,

 

Go read the documents.

 

It is all in the standard, and the user's guide.

 

For example, prior to any use of the JTAG interface, when it is first powered on, TDO is tristate.

 

Then, when the device decodes a command, it asserts TDO in response (or not, as the command may be to go to tristate).

 

Once a JTAG chain of devices is initialized and waiting for the next command, all the TDO are idle, but asserted.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Xilinx Employee
Xilinx Employee
5,032 Views
Registered: ‎08-01-2012

The JTAG in Spartan-6 designed as per IEEE1194.1 standard. Please refer that standard.

 

FYI; When not in SHIFT-IR or SHIFT-DR, TDO exhibits high-impedance.  In BYPASS mode, TDO equals the applied TDI data one TCK pulse earlier

 

The below application note is about "Using in-system programming in boundary scan systems” wrote for Xilinx CPLD family. But it is useful for understanding the theory part of in-system programming concepts which is applicable for Spartan-6 also. http://www.xilinx.com/support/documentation/application_notes/xapp070.pdf

 

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Adventurer
Adventurer
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Registered: ‎08-29-2014

Thank you.

The "FYI:" tells what I wanted to know.

View solution in original post

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Adventurer
Adventurer
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Registered: ‎08-29-2014
Thank you. Problem solved. The final answer was in your "FYI:"
/dindea
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Adventurer
Adventurer
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Registered: ‎08-29-2014
"Please mark this post as an \"Accept as solution\" ...": How do I do that? I find no relevant "button" or entruy in a drop-down menu.
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