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concattocarol
Visitor
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Registered: ‎09-02-2016

Ultrascale Tranceiver Example problem

Hi I am simulation the Ultrascale tranceiver and the. I am using the example generated by vivado.

Screenshot from 2016-10-21 13:31:25.png

 

Here is TX

Screenshot from 2016-10-21 13:22:11.png

 

And RXScreenshot from 2016-10-21 13:23:15.png

 

Do I need to do something in order to make it work?

 

I can see the RX is not align. Do I need to do something in order to align? This is just the example, I've changed anything.

 

 

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concattocarol
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Registered: ‎09-02-2016

So I added a MAC layer on the previus IP. And I only start to send data after the signal rxchannelisaligned is set to 1.

It seems to solve part of the problem. However now I have to issues, because the packet on the RX is shited to the right. An I receive on piece of frame correct and another incorrect, one correct and another incorret.

Screenshot from 2016-10-28 15:13:51.png

 

Screenshot from 2016-10-28 15:14:09.png

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concattocarol
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Registered: ‎09-02-2016

You can see in the figure that the packet Fbaaaaaaaaa.... after being deserialized on the RX is d55555555555.... It seems the the data is shifted. 

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