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Contributor
Contributor
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Registered: ‎06-15-2015

Using a port a clock source on ZC706 board

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Hi!

 

I am working on creating a block design in Vivado IDE (v2015.1). After the design is completed, I load that onto the ZC706 (Zynq 7000 Processor) board.

clock.JPG

 

Can someone please let me know about how to use the port('Clk') as a clock source for my design, and also how to define it in the .xdc file (design constraints file).

 

Thanks,

Vinay

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Scholar
Scholar
14,146 Views
Registered: ‎06-05-2013

Re: Using a port a clock source on ZC706 board

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@vinaygattu Do this

 

Use utility buffer to convert diff clk to single ended then apply  clk to counter ip.

 

clk_p

clk_n --> IBUFDS --> CLK--> counter

 

This should work

-Pratham

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

Re: Using a port a clock source on ZC706 board

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you can find some example here

 

http://www.xilinx.com/support/documentation/university/Vivado-Teaching/Digital-Design/2014x/docs-pdf/xup_building_basic_elements_lab.pdf

http://www.xilinx.com/support/university/vivado/vivado-teaching-material/digital-design.html

Thanks and Regards
Balkrishan
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Scholar
Scholar
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Registered: ‎06-05-2013

Re: Using a port a clock source on ZC706 board

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@vinaygattu Just apply clock,IOstandard and package pin constraint on clock port in XDC.

 

Something like this and pin constraint

 

create_clock -period 5.000 -name sysclk -waveform {0.000 2.500} [get_ports clk]

 

-Pratham

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Contributor
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Registered: ‎06-15-2015

Re: Using a port a clock source on ZC706 board

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Hi @pratham,

 

There is a system clock source at 200MHz. The signal pair is named SYSCLK_P and SYSCLK_N and each signal is connected to U1 (pins H9 and G9, respectively) on the XC7Z045 AP SoC.

 

I used these commands in the .xdc file.

set_property PACKAGE_PIN G9 [get_ports Clk]

set_property IOSTANDARD LVDS [get_ports Clk]

 

I am still not getting the clock output fro that port. 

 

Is it possible to define our own clock without using any pin on the ZC706 board?

 

Thanks,

Vinay

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Scholar
Scholar
14,147 Views
Registered: ‎06-05-2013

Re: Using a port a clock source on ZC706 board

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@vinaygattu Do this

 

Use utility buffer to convert diff clk to single ended then apply  clk to counter ip.

 

clk_p

clk_n --> IBUFDS --> CLK--> counter

 

This should work

-Pratham

----------------------------------------------------------------------------------------------
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Contributor
Contributor
7,990 Views
Registered: ‎06-15-2015

Re: Using a port a clock source on ZC706 board

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Thank you, Pratham!

Clock is working now.
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4,621 Views
Registered: ‎09-14-2016

Re: Using a port a clock source on ZC706 board

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hi,

i am using Zc706 first time.so I am trying to get system clock in a led but i am getting.

XDC and vhdl file i am attaching here 

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Teacher
Teacher
4,605 Views
Registered: ‎03-31-2012

Re: Using a port a clock source on ZC706 board

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verma.rahul58@ymail.com please don't restart old closed threads. Start a new thread with more detailed information on your problem.

 

One quick comment is that you will not be able to observe a clock toggling with an LED. Any clock will be too fast to observe and it will  just look like a constant amplitude at some fixed brightness, not a toggle.

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Observer
Observer
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Registered: ‎10-24-2018

Re: Using a port a clock source on ZC706 board

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Would you please suggest appropriate pin for sys_diff_clk required for utility buffer ip.

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Observer
Observer
1,595 Views
Registered: ‎10-24-2018

Re: Using a port a clock source on ZC706 board

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I am using zc706 board
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