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Observer
Observer
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Registered: ‎02-25-2016

Virtex-6 FPGA ML605

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ML605 xc6vlx240t 1ffg1156 FPGA chip How much I/O pin it has ?? without including peripherals.

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Observer
Observer
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Registered: ‎02-25-2016
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Explorer
Explorer
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Registered: ‎10-14-2015

Hi @rakeshgehalot,

 

Please refer product table for IO details for the target package

 

https://www.xilinx.com/support/documentation/selection-guides/virtex6-product-table.pdf

 

https://www.xilinx.com/support/documentation/boards_and_kits/ug534.pdf

 

Thanks,

Sarada

 

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Moderator
Moderator
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Registered: ‎07-31-2012

Hi ,

 

Refer to pinout specification of ML605 at https://www.xilinx.com/support/documentation/user_guides/ug365.pdf

 

Regards

Praveen


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Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008
you can find all the documentaiton here
https://www.xilinx.com/products/boards/ml605/reference_designs_12.3_archive.htm
Thanks and Regards
Balkrishan
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Observer
Observer
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Registered: ‎02-25-2016
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