[Vivado 12-1433]

[xspai]

My first post and yes I did search if others got the following error:

CRITICAL WARNING: [Vivado 12-1433] Expecting a non-empty list of cells to be added to the pblock.  Please verify the correctness of the <cells> argument.

It comes from the following constraint:

add_cells_to_pblock pblock_pcie0 [get_cells [list *fS2MsgOut*]]

When I execute the tcl command "get_cells [list *fS2MsgOut*]", I got garbled output in tcl console. After cutting and pasting the

output, I saw valid text (cells) but rather a very long list.

I'm confused why the tool thinks that the list is empty.

[balkris]

The same error discussed in this post
https://forums.xilinx.com/t5/Design-Entry/3rd-party-IP-integration-in-Vivado/td-p/538723

check this user guide as well
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_1/ug835-vivado-tcl-commands.pdf

[vijayak · Accepted solution]

Hi @xspai

Please follow the procedure given to draw the pblocks.

http://www.xilinx.com/support/answers/59424.html

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_2/ug938-vivado-design-analysis-closure-tutorial.pdf