UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Contributor
Contributor
4,378 Views
Registered: ‎06-15-2015

Vivado IDE: Block Memory Generator

Hello!

 

Can anyone please provide a reference or example block design in Vivado IDE, in which 'block memory generator' IP can be used to control GPIO LEDs on ZC706 evaluation board.

 

Thanks.

0 Kudos
2 Replies
Xilinx Employee
Xilinx Employee
4,369 Views
Registered: ‎08-01-2008

Re: Vivado IDE: Block Memory Generator

The Block Memory Generator primarily use for generating BRAM interface for different configuration
You can check BMG product guide here
http://www.xilinx.com/support/documentation/ip_documentation/blk_mem_gen/v8_2/pg058-blk-mem-gen.pdf

Which signal you want to monitor on LED GPIO .

Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
0 Kudos
Contributor
Contributor
4,363 Views
Registered: ‎06-15-2015

Re: Vivado IDE: Block Memory Generator

I want to control the blinking of GPIO LEDs using BRAM output 'douta'

 

0 Kudos