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yeelun
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Registered: ‎12-14-2014

XPE for Zynq on DDR3L and LPDDR2

I am trying to estimate the power consumption on PS's DRAM controller through XPE for the part, Zynq XC7Z030 SBG485 -1. When I changed the memory type (In PS tab) from DDR3L to LPDDR2, I see a great decrease in power consumption for Vcco_DDR from (233mW to 85mW, -63.5% fall). 

 

I have no experience with the utilization of LPDDR2 and I am quite surprise to find such a huge difference on power consumption between DDR3L and LPDDR2. I doubt if the figure for LPDDR2 on power consumption is good to refer to?

 

The memory settings are Data Width: 32, Clock: 533MHz, Read Rate: 10%, Write Rate :10%. 

 

Thank you!

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balkris
Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

use these links . You need to XPE and other tools

http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/ug440-xilinx-power-estimator.pdf

 

http://www.xilinx.com/products/design_resources/signal_integrity/resource/cal_estimators.htm
https://www.xilinx.com/products/technology/power.html
http://www.xilinx.com/video/technology/power-estimation.html
http://www.xilinx.com/products/technology/power/xpe.html

Thanks and Regards
Balkrishan
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watari
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Registered: ‎06-16-2013

Hi yeelun

 

I don't know whether your post (" When I changed the memory type (In PS tab) from DDR3L to LPDDR2, I see a great decrease in power consumption for Vcco_DDR from (233mW to 85mW, -63.5% fall).") is correct or not.

 

But, I know the different point between DDR3L and LPDDR2.

Here is different points from my understanding.

 

- Different supply voltage (DDR3L = 1.35[V], LPDDR2 = 1.2[V](I/O) and 1.8[V](Core))

- IO's power consumption is dominant.

- Spec. of drive impedance is different.

- LPDDR2 doesn't support ODT (to DRAM/to Controller). If the design for DDR3L use ODT (to DRAM/to Controller), power consumption increase.

 

So, I guess your post is correct.

 

Thank you.

Best regards,

 

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yeelun
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Registered: ‎12-14-2014

Hi Balkris,

 

Perhaps my question is not clear enough. I have the following questions need to be answered.

 

Q1: Just to cross check with Xilinx on different memory controller type's power consumption as the estimated figure dropped from 0.208W (DDR3L) to 0.072W (LPDDR2), at about -63.5%. By moving from 1.35V to 1.2V signalling will only see ~11% in power consumption reduction. Please enlighten me on how to get such a great drop in power consumption?

 

Q2: How accurate is this power estimator spreadsheet (in percentage form)?

 

Thank you.

 

XPE1.PNG

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yeelun
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Registered: ‎12-14-2014

Hi Watari,

Thanks for your input. That's a good point.

However, I do not foresee the power consumption will drop such much eg. ~40mW see even after taking the ODT's power consumption into account. Any idea on what other factors could contribute to such a great drop? 

Thank you.
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