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drtracy1
Newbie
Newbie
3,493 Views
Registered: ‎04-05-2014

Xilinx adding two 4 bit input + 7 seg display

I need to do this "Take in two 4 bit inputs (A and B), adding them
together, and then decoding the result into a format that a 7 Segment display
supports. You must also indicate any overflow with an “o” on the display."

 

I'm struggling on how to do this very much, our professor JUST introduced us to Xilinx and told us to do this with no prior knowledge of circuits...

 

module Proj2Module(
    input [3:0] a,
    input [3:0] b,
    output [3:0] sum,
    output carry
    );
        wire cin;
       
        assign cin = 1'b0;
        SingleStage s0( .a( a[0] ), .b( b[0]), .cin( cin ), .s( sum[0]), .cout( ripple0 ) );
        SingleStage s1( .a( a[1] ), .b( b[1]), .cin( ripple0 ), .s( sum[1]), .cout( ripple1 ) );
        SingleStage s2( .a( a[2] ), .b( b[2]), .cin( ripple1 ), .s( sum[2]), .cout( ripple2 ) );
        SingleStage s3( .a( a[3] ), .b( b[3]), .cin( ripple2 ), .s( sum[3]), .cout( carry ) );

endmodule

 An Xilinx wiki says that this adds up two 4 bit inputs.. but how do I decode this into something a 7 segment display can use?

Extremely frustraited and confused, any help would be appreciated.

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eteam00
Instructor
Instructor
3,407 Views
Registered: ‎07-21-2009

Suggest you ask your instructor.  It is the instructor's job to provide you with instruction and guidance sufficient to answer classroom assignments.  If this is not happening, the instructor needs to know.

 

If you want to understand 7-segment displays, suggest you learn the use of web search engines.

 

If you want some quick, simple FPGA design examples, try www.fpga4fun.com.

 

-- Bob Elkind

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