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Visitor djbennett01
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4,662 Views
Registered: ‎01-28-2013

Zynq Block Design Creation using SPI and I2C peripherals

I am new to Zynq devices, and I am utilizing the IP integrator to create a design containing IP and Programmable Logic. I have been using the Vivado tools to create some simple test cases for the Zedboard that appeared to work ok with the logic that I added in my top level verilog file. I created the design using the Block Design editor within Vivado, I then created a top level verilog file, and added my own verilog code along with adding the instantiation template of the Block Design which included the Zynq7 processing system. The design synthesized, and passed implementation without errors, and created a reasonable RTL schematic. I am now working on creating a .hdf file, and top level design file, for an existing board design that we created for a customer. I have instantiated the Zynq7 processing system, I editted the Zynq configuration to enable one of the UARTs, two of the SPI ports, and the 2 I2C ports. When I look at the block diagram, schematic, the UART signals show up on the block, but not the SPI ports or the I2C ports. Also, they don't show up in the list of ports in the Design window. Nor do these signals show up in the instantiation template. Within the Zynq Block Design Window I can see that all of the appropriate peripherals are checked. I don't know if I am doing something incorrectly. I am assuming that I should be able to see the signals for these ports in the Block Design window. Note that the UART signals are routed to the PL using the EMIO and then to an output pin. Where the SPI and I2C signals are both going to MIO connections. I am assuming that this may be the reason that they don't show up in the port list and block diagram. Maybe Vivado already knows so the user doesn't have to be explicit and define the pin numbers in Pin Planning? I would appreciate any thoughts on this subject.

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