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Registered: ‎12-23-2015

Zynq Ultrascale+ SoC - Stress related inputs

We are using Zynq Ultrascale+ SoC “XCZU9EG-1 FFVC900I” in our design.


For preparing the stress details of each component used in our module, the details of current or voltage applied over the component need to be entered.


Hence please give me the specification about the current / voltage applied over the below mentioned pins


  1. In PS GTR bank, one 500R resistor connected with PS_MGTRREF


  1. In PL GTH bank, for calibration 100R resistor connected between MGTAVTTRCAL_L/R & MGTRREF_L/R
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