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2,439 Views
Registered: ‎12-23-2013

long simulation time for IFFT-64K

Dear all,

 

I am using the Xilinx IFFT IP core v.7.1 in my design. My problem is the simulation is indeed time-consuming. For two parallel IFFT- 64K Xilinx IP Core, I am waiting nearly 50 minutes to get my data ready! Is it normal? Please note that I doing only functional test using ModelSim. Is there any way that I can run the simulation faster?

 

Another question is; I want to save the entire wave form signals in a file to observe the signal in future again. Is there any way to do so in ModelSim?

 

Any suggestion in this regard will be much appreciated.

 

Many Thanks,

Shervin Zargham

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2 Replies
Xilinx Employee
Xilinx Employee
2,429 Views
Registered: ‎08-02-2011

Re: long simulation time for IFFT-64K

RTL simulation time depends on a number of factors. Depending on your setup, 50 minutes is not unheard of for 64K FFT...

If you are using the structural simulation model rather than the behavioral one, this will slow down the sim.

Yes, you can write data to a file. Do a google search for 'vhdl file io' or 'verilog file io'
www.xilinx.com
2,386 Views
Registered: ‎12-23-2013

Re: long simulation time for IFFT-64K

Thank you so much for your reply and sorry to get back late.

 

Yes you are right I can write the data into a file using VHDL syntax which I already do so. However my question was something else; I want to save my data in wave format at MODELSIM and reopen it in future. Do anyone know how to do it ?

 

Sorry if I asked my question not clearly in my previous post.

 

Many Thanks,

Shervin Zargham

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