number of used elements

[bamerni]

dear xilinx users 

it is my first xilinx project that i am write 

now the supervisor ask me to calculate the number of elements that is used in the project (i.e. the number of AND, OR, XOR and flip flop from the synthesis report 

how can i get this information from the report

[muravin · Accepted solution]

You can get the number of flip flops from the place/route report (par file for ISE or report_utilization command in VIVADO).

As for the number of AND, OR, XOR, etc, you should tell your supervisor that there is only a rule of thumb to approximate a gate count from the FPGA LUT utilization.

Regards
Vlad

[bamerni]

thank you for your reply