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Registered: ‎03-01-2016

tie unused address lines to ground - mig core rldram3

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I am using an example design provided by Vivado and want to use I want to use 11 out of the 20 address lines provided and tie the others to ground. This would save me 9 IO pins on the fpga.

 

I would like to do something along the lines of : 

 

module example_top (

...

  output [10:0] c0_rld3_a, 

...

);

...

rld3_0 u_rld3_0(

...

.c0_rld3_a ({9'b0,c0_rld3_a}),  //output [20:0] c0_rld3_a, 

...

);

 

 

However this creates the error:

[Mig 66-99] Memory Core Error - [u_rld3_0] MIG Instance port(s) c0_rld3_a[11],c0_rld3_a[12],c0_rld3_a[13],c0_rld3_a[14],c0_rld3_a[15],c0_rld3_a[16],c0_rld3_a[17],c0_rld3_a[18],c0_rld3_a[19],c0_rld3_a[20] is/are not connected to top level instance of the design

 

Is there any way to tie these to ground? 

 

Thanks,

Sam

 

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13,174 Views
Registered: ‎03-01-2016
setting Address Mux to Mulitplexed in MIG removes changes the bus width to 10:0

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Registered: ‎03-01-2016
* I want to use 11 out of the 21 address lines provided
* c0_rld3_a ({10'b0,c0_rld3_a}),
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Registered: ‎03-01-2016
setting Address Mux to Mulitplexed in MIG removes changes the bus width to 10:0

View solution in original post

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