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25G, 50G, and 100G Ethernet: Pick any three from the Xilinx Ethernet IP portfolio

Xilinx Employee
Xilinx Employee
0 0 43.2K

 

Yesterday, Xcell Daily highlighted a new video about the integrated (hardened) 100G Ethernet MAC, PCS, and RS-FEC IP blocks available in Xilinx Virtex UltraScale+ devices. (See “4 Minutes to Error-Free 100G Ethernet Operation using Xilinx UltraScale+ Integrated 100G IP.”)

 

The formal announcement date for the integrated 100G Ethernet IP turns out to be today. Oops. My bad.

 

What was not covered in yesterday’s blog was a quantification of how much power you save with the integrated version of the 100G Ethernet IP. According to the announcement, it’s a whopping 80%. To reiterate from yesterday’s blog post, with as many as twelve hardened 100G MAC/PCS/RS-FEC blocks available in Xilinx Virtex and Kintex UltraScale+ devices and Zynq UltraScale+ MPSoCs, the hardened Ethernet IP blocks also save considerable on-chip resources that you can use for other parts of your design and design timing closure becomes that much easier.

 

Today’s announcement also reminds you that the Xilinx high-speed Ethernet IP portfolio includes IP for 25GBASE-CR/KR, 50GBASE-CR2/KR2, and 100GBASE-CR4/KR4. So no matter how fast you want your Ethernet, we’ve got you covered.

 

Xilinx will be demonstrating the integrated 100G Ethernet MAC and RS-FEC in its 16nm UltraScale+ devices at OFC 2016, next week in Anaheim.