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28Gbps backplane demo highlights Samtec low-loss connectors using Virtex UltraScale FPGAs

Xilinx Employee
Xilinx Employee
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Spotted at this week’s DesignCon—a 28Gbps backplane demo using two Xilinx VCU109 Eval boards talking to each other over a big, stubbed-out backplane. The boards are running eight 28Gbps GTY SerDes channels of PRBS31 data over the backplane. Here’s the photo:



Teraspeed 28Gbps Backplane Demo using UltraScale VCU109 Eval Kit.jpg



Just look at that big, gorgeous eye on the laptop. That’s what backplane designers want to see.


The demo was in Teraspeed Consulting’s booth. I discussed the backplane demo with Wis Macomson, a Signal Integrity consultant at Teraspeed. The setup proves out the characteristics of Samtec’s high-speed ExaMAX interconnect system, which Samtec recently licensed from FCI Electronics. The backplane’s running at 28Gbps over what looks like at least a foot-long a 20-inch backplane board. (See note below.) There are two Xilinx UltraScale VCU109 Eval boards plugged into opposite ends of the backplane talking to each other and there are four additional boards plugged into intermediate backplane slots creating plenty of stub reflections to challenge the backplane communications.


Here’s a short Samtec Video showing the ExaMAX interconnect system in more detail:





Samtec ExaMax from Samtec on Vimeo.



To conduct this 28Gbps backplane connector test for Samtec, Teraspeed needed:


  • Efficient, clean 28Gbps SerDes transmitters
  • Bullet-proof 28Gbps SerDes receivers
  • Significant link-margin analysis support that does not interfere with the SerDes testing


The consulting engineers at Teraspeed found all three in the Xilinx Virtex UltraScale VU095 FPGAs on the two VCU109 boards. Just take a look at that eye diagram in the photo. It’s generated from data supplied by the on-chip 2D Eye Scan block embedded inside of each UltraScale SerDes port and the Vivado iBERT Serial I/O toolkit. (Note: these same SerDes tools are available for earlier Xilinx All Programmable devices as well).



Note: I received this email from Scott McMorrow at Teraspeed on 2/3/2015:




We appreciate the plug on your blog 


I'm the signal integrity design leader on the Teraspeed ExaMax backplane. To add a bit of additional information to your blog, the slots chosen for the UltraScale boards have a path length of approximately 20 inches. With the additional trace length on the VCU109 boards, I'm guessing that total path length is approximately 30-ish inches.  Our technology demonstrator was designed to showcase what is possible with the Samtec-sourced ExaMax connector using advance design optimization techniques that minimize insertion loss, return loss, and crosstalk, while utilizing advanced Tachyon PCB materials from Isola.


I'd be happy to answer any additional questions that you have.