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Xilinx turned 30 years old this year and the programmable-logic industry has evolved significantly in the last three decades. That means there’s a lot of forgotten technology swept under the carpet. For fun, let’s peel back the rug and see what’s there:
Schematic Entry – Once upon a time, schematics were all that engineers had. It was a big jump in the 1980s to go from vellum drafting paper, a mechanical pencil, a straightedge, a green logic template, a motorized eraser, and a metal erasing template to computer-based schematic capture. By the time FPGAs arrived on the scene in the mid-1980s, the conversion was well underway. However, as FPGAs got larger, schematics became overly complex and unwieldy—and that’s exactly what happened with ASIC design just a few years earlier. By the 1990s, growing complexity eventually forced engineers to learn Verilog and VHDL to make use of the larger devices and it’s now become fashionable to sneer at schematic capture. However, you can see schematic entry reborn in the IP Integrator tool found in the Xilinx Vivado Design Suite, where IP complexity is hidden from view in the form of graphical IP blocks and graphical design is now returning to respectability.
FPLAs, PALs and GALs – Signetics introduced the first programmable logic devices, called FPLAs (field-programmable logic arrays) in 1975. They were big, slow, expensive, hard to use, and they drew a lot of power—a perfect recipe for commercial oblivion. The first successful programmable-logic devices were streamlined FPLAs dubbed PALs (Programmable Array Logic) by Monolithic Memories Inc (MMI). Streamlining consisted of eliminating the fusible OR interconnect array, which greatly simplified the on-chip interconnect and the programmable fusing. Originally, MMI made bipolar PALs and they were inexpensive enough to encourage a “blow-and-go” engineering design style that skipped any sort of simulation. Many design engineers had little piles of used PALs on their workbenches to remind themselves to be more careful. (I kept my dead PALs in a paper cup.) PALs were so successful that National Semiconductor, TI, and AMD started to offer pin-compatible devices. In the great bipolar-to-CMOS crossover during the 1980s, bipolar PALs became EPROM-based GALs (generic array logic), which eventually evolved into CPLDs.
Fuse maps – We didn’t always have HDLs to configure programmable logic. Engineers once used fuse maps—direct representations of the on-chip fusing and interconnect. You took your logical equations and marked up a photocopy of the on-chip interconnect from the PAL data book to indicate which fuses should be blown and which should remain intact. Then you manually transferred the fuse map to ASCII strings of zeroes and ones in a programming file to tell the device programmer which fuses to blow and which to leave intact. Fortunately, fuse-map programming disappeared very quickly. Here’s a photo of an MMI fuse map, which appeared in the EETimes article “How It Was: Programmable Logic” by Max Maxfield. The article is based on a story told by Aubrey Kagan, engineering manager at Emphatec, a Toronto-based design house of industrial control interfaces and switch-mode power supplies.
ABEL (Advanced Boolean Expression Language) – An early hardware-description language introduced by Data I/O Corporation in April, 1984. In those early days, ABEL competed with CUPL and PALASM. Data I/O spun off the ABEL product line into an EDA company called Synario Design Systems and then sold Synario to MINC Inc in 1997. MINC was focused on developing FPGA development tools. The company closed its doors in 1998 and Xilinx acquired some of MINC’s assets including the ABEL language and tool set. Abel then became part of the Xilinx Webpack tool suite. Click here for a history of the ABEL language written by Michael Holly, one of the original developers at Data I/O.
CUPL (Compiler for Universal Programmable Logic) - Assisted Technology in San Jose, California originally developed CUPL and released it in September, 1983. CUPL was written in C for portability and was the first commercial design tool to support multiple PLD families. Personal CAD Systems (P-CAD) acquired Assisted Technology and CUPL in 1985. Programming-device vendor Logical Devices later acquired CUPL and subsequently sold it to Altium where it appeared in Altium’s Protel design system in the 1990s and can now be found as a plug-in for Altium Designer. Logical Devices still offers PAL/PLD design software for PROM-based and EPROM-based programmable-logic devices. The product is known as CUBEL and is based on the earlier CUPL and ABEL hardware description languages.
PALASM – The “PAL Assembler” co-authored by MMI’s John Birkner in the early 1980s to supersede fuse-map programming. It was originally written in Fortran IV and ran on mainframes and minicomputers. Birkner also founded Structured Design, which offered the SD20 PAL programmer for first-generation, 20-pin MMI bipolar PALs and the SD20/24 programmer, which added support for 24-pin PALs. The Structured Design device programmers had a built-in PALASM assembler—no minicomputer needed. You stored your programs on the SD20’s Exatron “Stringy Floppy” tape drive or moved the programs into and out of the programmer using its RS-232 serial interface, usually connected to a PC.
Data I/O Device Programmers – When you wanted the Cadillac of device programmers, whether for EPROMs or programmable-logic devices, you went to Data I/O, the first commercial source for programmers. Data I/O was founded in 1969 and offered a series of increasingly capable products throughout the 1970s as device complexity rose. During the 1980s, Data I/O introduced versions of the Model 29 programmer, which could program EPROMs using UniPak adapters and PLDs through a LogicPak plug-in adapter. Data I/O now offers large, high-speed device programmers designed for production lines.
Data I/O Model 29B Programmer with LogicPak adapter. Photo credit: Michael Holley
UV Erasers – The earliest programmable-logic devices used on-chip programming fuses. They could be programmed once, which usually created quite a pile of dead chips on the design engineer’s desk. Some PLD vendors quickly realized that erasable PLDs would be attractive and they adapted UV EPROM cells for use in PLDs, which meant that most design labs had a UV eraser somewhere handy to wipe programmed devices clean. Once quite expensive, you can now purchase simple UV erasers for as little as $20 from Amazon.com.
Texas Instruments TTL Data Book - If you were a digital designer in the 1970s, the TI TTL Data Book in the very familiar burnt-orange cover was your bible. In it, you would find all of the building blocks available to create digital systems. TI’s 7400 series logic family predates the 1971 introduction of the first microprocessor and many systems were developed completely from TTL devices, with no microprocessors or other LSI chips. The first IP blocks created for programmable-logic devices were based on the more complex parts described in the TI TTL Data Book and its supplements, which made it easy for designers to implement systems based on programmable logic using digital building blocks they already understood—an early version of IP reuse.
After nearly four decades, this TI TTL Data Book (circa 1976) is still on my bookshelf at work.
Photo credit: Steve Leibson
