UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 

Are you incorporating standard interfaces in your DFT strategy to aid production ATE board testing? With Zynq?

Xilinx Employee
Xilinx Employee
0 0 37.6K

Dave Jones, proprietor of the EEVblog.com video blog site is a font of practical electronics wisdom and last week Dave recorded a 30-minute video titled “DFM Automated PCB Panel Testing” that documents his use of standard interfaces such as the older PCI bus to aid in production ATE board testing. Here’s a screen capture of one of Dave’s old board designs with a dedicated ATE connection based on PCI:

 

Dave Jones ATE Connector.jpg 

 

I thought this was a great idea because it brings out a high-bandwidth port just for testing purposes using standard, low-cost hardware. Dave’s new video got me thinking about some of the myriad standard ports incorporated into Zynq All Programmable SoCs, but in an entirely new way—as ATE ports.

 

Three Zynq SoC ports come to mind immediately: Gigabit Ethernet, USB, and PCIe. All Zynq SoCs have Gigabit Ethernet and USB ports and four of the six members of the Zynq SoC family (Z7015, Z7030, Z7045, and Z7100) have hardened PCIe IP cores. These ports are available for use in the end product, of course, but they are also available as high-speed ATE ports that enable some truly sophisticated production board testing—especially when coupled with the on-chip processing power of the Zynq SoC’s dual-core ARM Cortex-A9 MPCore processor, which can significantly offload a lot of the testing from the ATE equipment and thus speed up the test. Faster ATE testing leads to shorter test times and less time on the tester, which in turn reduces testing costs.

 

A little Googling turned up another interesting facet. Xilinx Alliance Program member National Instruments published an informative White Paper on this subject last year titled USB for Automated Test. The National Instruments’ White Paper contains this graph showing the bandwidth of relevant standard interfaces over time:

 

NI Bus Bandwidth Progression.jpg 

 

Note that all three of the most modern interfaces in this chart are available on Zynq SoCs.

 

If you’re designing production pcbs destined for automated testing, especially panelized pcbs, then Dave Jone’s latest video is truly worthy of your attention and I’m embedding it in this blog for your consideration:

 

 

 

 

http://www.youtube.com/watch?v=2zGisPMNstI#t=177

 

 

Tags (5)