Alpha Data ADM-PCIE-7V3 PCIe accelerator board based on a Xilinx Virtex-7 FPGA
CAPI as implemented on IBM’s POWER8 systems provides a high-performance way to implement client-specific, computation-heavy algorithms on an FPGA. These accelerated algorithms can replace application programs running on a POWER8 processor core. Using CAPI, POWER8 systems can treat the FPGA-based accelerator as a coherent peer to the POWER8 processors. Because of CAPI's peer-to-peer coherent relationship with the POWER8 processors, data intensive programs are easily offloaded to the FPGA and these offloaded functions operate as part of the application, which results in higher system performance with a much smaller programming investment. In IBM’s view, this approach allows hybrid computing to be successful across a much broader range of applications.
Here’s a block diagram of the way this all works:
Alpha Data CAPI Acceleration Development Kit Hardware Block Diagram
The Alpha Data CAPI Acceleration Development Kit includes the PSL (Power Service Layer), which resides on the FPGA and provides the infrastructure connection to the POWER8 chip; examples of user-defined AFUs (Accelerator Function Units); as well as CAPI-specific OS Kernel extensions and library functions. This kits includes all needed components to significantly reduce development time.
Note: This announcement is part of the OpenPOWER Summit taking place today in Beijing.