UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 

“Dance with the one that brung ya.” EE Journal’s Kevin Morris zeroes in on Softly-Defined Networks

Xilinx Employee
Xilinx Employee
0 0 44.5K

Softly-Defined Networks is a very new concept, announced only last week by Xilinx, that takes SDN a step further.

 

Last week, EE Journal’s Kevin Morris published an article about the Xilinx “Softly-Defined Networks” announcement titled “‘Softly’ Defined Networks: Xilinx Punches Up the Programmability.” If you haven’t heard about this new version of SDN (software-defined networks), I’m not surprised. Softly-Defined Networks is a very new concept, announced only last week by Xilinx, that takes SDN a step further.

 

As Stanford’s Professor Nick McKeown said at the Xilinx Emerging Technology Symposium explained this year, SDN is a network in which the control plane is separate from the forwarding plane and a single control plane controls several forwarding devices. (See “A fast introduction to SDN from Stanford Professor Nick McKeown.”) As SDN is usually envisioned, the network control plane manages a collection of Ethernet switches that follow a common protocol. The desired result is simpler (and cheaper) switch hardware that reduces maintenance costs because of the common programming language all SDN switches will share.

 

However, this vision for SDN doesn’t solve all networking problems. As Morris writes, “This approach obviously allows some flexibility in the definition and configuration of the network in software. But - what if the part you need to change is in the data plane?”

 

Morris then describes the new Xilinx development environment for Softly-Defined Networks:

 

“Softly-defined networks pick up where SDN leaves off - making both the hardware AND the software programmable. Xilinx calls their initiative the “Software Defined Specification Environment for Networking (SDNet).” SDNet is the closest thing we’ve ever had to a turnkey platform for the design of high-performance packet processing systems. What do we mean by “turnkey”? We mean that you can compile a high-level specification into a hardware/software implementation on a Xilinx device - without having to be an expert in VHDL or Verilog.” (The emphasis is mine.)

 

“In Xilinx’s SDNet world, your system architect defines the specifications for the network in an “intuitive” high-level environment. The company claims that these specifications allow the packet processing functions to be described in a natural way, without any implementation detail. These specifications are then processed by an integrated set of development tools into an “optimized hardware implementation” on Xilinx devices - including the hardware blocks for specific functions such as parsing and editing, packet data plane subsystems, custom firmware to support the generated architecture, and test benches for design validation.”

 

The Xilinx SDNet environment is specifically tailored to the needs of network engineers developing new types of networking equipment. It is a first example of a type of development tool that raises the level of design abstraction above HDL-based logic design into the realm of application-centric and model-based design—a concept that Xilinx calls All Programmable Abstractions.

 

 All Programmable Abstractions.jpg

 

Kevin Morris is already keyed into this concept, it appears. He concludes his article on Softly-Defined Networks by writing:

 

“As the FPGA market has matured, one of the biggest obstacles to increased adoption has been the learning curve required for FPGA design. As FPGAs expand into new markets and new applications, it becomes clear that there is no magic, unified language or environment that will facilitate the use of programmable logic in all application domains. Therefore, it is incumbent on the companies who want to sell FPGAs to create smooth design flows tailored specifically to the needs of their most important problem domains. There is no better place to start than with the biggest FPGA market of them all - and that is exactly what Xilinx has done here - following the timeless rule: ‘Dance with the one that brung ya.’”

Tags (2)