The ability to cancel interfering noise without a reference signal. (Competing solutions focus on AEC—acoustic echo cancellation—which cancels noise relative to a required audio reference channel.)
Support for non-uniform 1D and 2D microphone array spacing.
Scales up with more microphones for noisier environments.
Offers a one-chip solution for sound capture, multiple wake words, and customer applications. (Today this is a two-chip solution.)
Makes everything available in a “software-ready” environment: Just log in to the Ubuntu linux environment and use Aaware’s streaming audio API to begin application development.
Aaware’s Far-Field Development Platform
These features are layered on top of a Xilinx Zynq SoC or Zynq UltraScale+ MPSoC and Aaware’s CTO Chris Eddington feels that the Zynq devices provide “well over” 10x the performance of an embedded processor thanks to the devices’ on-chip programmable logic, which offloads a significant amount of processing from the on-chip ARM Cortex processor(s). (Aaware can squeeze its technology into a single-core Zynq Z-7007S SoC and can scale up to larger Zynq SoC and Zynq UltraScale+ MPSoC devices as needed by the customer application.)
Aaware’s algorithm development is based on a unique tool chain:
Algorithm development in MathWork’s MATLAB.
Hand-coding of an equivalent application in C++.
Initial hardware-accelerator synthesis from the C++ specification using Vivado HLS.
Use of Xilinx SDSoC to connect the hardware accelerators to the AXI bus and memory.
This tool chain allows Aaware to fit the features it wants into the smallest Zynq Z-7007S SoC or to scale up to the largest Zynq UltraScale+ MPSoC.