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Development team at Yonsei University demos full-duplex LTE prototype for 5G systems

Xilinx Employee
Xilinx Employee
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A research group at Yonsei University working on future wireless communications systems has demonstrated a real-time, full-duplex LTE radio system at IEEE Globecom in Austin, Texas last December. The team is using a novel antenna approach and has been working with National Instruments SDR platforms and the LabVIEW graphical programming environment. The full-duplex prototype is based on the LTE downlink standard with the following system specifications:

 

  • Transmission bandwidth of 20 MHz
  • 72 MHz sampling rate
  • 15 kHz subcarrier spacing
  • 2048 fast Fourier transform (FFT) size
  • Variable 4/16/64 quadrature amplitude modulation (QAM)

 

Here’s a block diagram of the prototype system:

 

 

Full-Duplex LTE SDR Prototype Block diagram.jpg 

 

 

Note that the red rectangle in the block diagram performs the real-time baseband signal processing and digital self-interference cancellation required for full-duplex operaiton, implemented with a National Instruments PXIe-7965R FlexRIO FPGA module based on a Xilinx Virtex-5 SX95T FPGA. For further technical details, see “Prototyping Real-Time Full Duplex Radios” on the National Instruments Web site. Also, here’s a short 4-minute video about the project:

 

 

 

 

 

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