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JDSU 400G Ethernet test platform at OFC 2015 based on Xilinx 20nm UltraScale devices. Here’s the video:

Xilinx Employee
Xilinx Employee
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On display at OFC 2015 a couple of weeks ago and now formally announced, JDSU has rolled out its pre-standard ONT 400G Ethernet test platform based on Xilinx 20nm UltraScale All Programmable devices. The new test platform employs JDSU’s successful ONT test platform architecture, which pioneered the concept of comprehensive module stress testing using less test equipment. The 400G Ethernet standard is currently in flux and JDSU required a reliable implementation technology that could simultaneously support the evolution of the 400G Ethernet standard and of JDSU’s growing product line. That’s why JDSU engineers selected the 20nm UltraScale FPGAs: because these devices have the speed and SerDes ports required to support 400G development with the needed flexibility to keep up with the evolving and future standards. Perhaps your high-speed networking project has similar needs.

 

Seeing is believing, however. It’s one thing to announce that such a leading-edge product exists in a press release. It’s quite another to show the working demo running on real hardware, so here’s the proof-of-existence video from OFC 2015: