We’ve all seen video-centric control and decision-support rooms so many times—at MI6 HQ in James Bond movies, in broadcasts of space launches at NASA and ESA, and even front and center at CERN supporting the Higgs boson researchers—that they sort of blend into our mental scenery. But it takes a lot of video wizardry to take any arbitrary set of video streams and place them cleanly, clearly, and intelligently on a wall mosaic built from multiple video displays and projectors. RGB Spectrum in Alameda, California has been doing just that for nearly 30 years. Earlier this year, the company introduced its next-generation MediaWall V UHD Display Processor, the world’s first video-wall display processor designed to reach new markets driven by 4K-video by handling true, any-to-any UHD video from source to display and they’re using three generations of Xilinx FPGAs to do it.
RGB Spectrum MediaWall V Display Processors, 6RU and 3RU Configurations
The MediaWall V Display Processor’s architecture combines real-time, hardware-based video processing with a separate processor to run applications. The result is a 4K video wall processor with enough power and versatility to drive both HD and UHD video wall systems. In its maximum Model 550 (6RU) configuration, the MediaWall V processor accepts as many as 36 UHD video or graphic direct inputs and outputs video to as many as 28 display devices. It processes a full range of video resolutions from 4K (4096 x 2160) and UHD (3840 x 2160) to 2K (2048 x 1152/1080) and HD (1920 x 1080). The display processor can scale each input stream individually for output to a UHD video wall or for display on standard video walls. An optional Application Processor decodes IP camera and other H.264 streams. Built-in HDCP capability allows the display of protected content.
The video wall processor’s built-in, Web-based set-up GUI supports both local and remote access, drag-and-drop window positioning and scaling, wall layout presets, and input selection. The 4K video wall processor can display any combination and configuration of window layouts across a multi-screen array. Windows can be sized as required anywhere within the display array, within or across screen boundaries, in any aspect ratio, and windows can be enlarged to emphasize details.
The company was able to reuse a lot of its own design IP developed for previous-generation products as well as previously used and new 3rd-party IP (including IP from Xilinx). That’s one of the many reasons that the company has incorporated three generations of Xilinx FPGAs into the product:
There are 48 Xilinx FPGAs in the 3RU version of the MediaWall V system and 95 FPGAs in the 6RU version, which has twice the video-I/O capacity. Six Kintex-7 FPGAs implement all of the system’s video-output processing while the Artix-7 FPGA generates multiple 640x480-pixel thumbnail images per second in real time using an Open Cores JPEG encoder. The rapidly updated JPEGs are employed by the system’s user control interface, which is handled over an Ethernet connection between the MediaWall V processor and one or more control workstations. Eight Virtex-5 FPGAs implement multi-channel video scaling using existing designs from earlier RGB Spectrum products. Each Virtex-5 FPGA implements 48 video scalers and drives eight output channels. Thirty-two Spartan-6 FPGAs provide general data multiplexing within the system and one Spartan-6 FPGA provides the heartbeat of the entire MediaWall V system by generating clocks and timing for all of the other subsystems. RGB Spectrum uses a wide range of Xilinx IP in these designs including the MicroBlaze soft processor cores, PCIe interfaces, DDR3 SDRAM controllers, the Test Pattern Generator, and LVDS SerDes cores.
RGB Spectrum generously allowed me to photograph the boards in the MediaWall V system to show how the Xilinx FPGAs are used throughout the system:
RGB Spectrum MediaWall V Host Processor based on a Xilinx Artix-7 FPGA
RGB Spectrum MediaWall V Windows Processor based on a Xilinx Virtex-5 FPGA
RGB Spectrum MediaWall V Wall Output Module based on Xilinx Kintex-7 FPGAs
RGB Spectrum MediaWall V Motherboard with a Xilinx Spartan-6 FPGA for system-level clock/timing generation
RGB Spectrum MediaWall V Display Processor system cage
Although there are software-programmable ways to handle video using microprocessors, hardware-level video processing as implemented with FPGAs provides significant benefits required for these pro-level applications according to RGB Spectrum. In particular, FPGA-based processing allow the company’s MediaWall V Display Processor to handle any oddball input or output format smoothly. For example, 140Mpixels/sec or 140.5Mpixels/sec input video bit rates can be matched and captured precisely. Unusual display timings, frequently encountered with LED wall displays, are handled just as easily.
Overall, Xilinx FPGAs perform numerous functions in RGB Spectrum’s MediaWall V Display Processor including:
Border generation and management
Foreground generation (real-time clocks and labels)