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Renesas Network Search Engine + Xilinx Programmable Packet Processor = Deterministic Deep Database Search Engine

Xilinx Employee
Xilinx Employee
0 0 48K

This week in Japan, Renesas will be demonstrating a Deterministic Deep Database Search Engine based on one of the company’s S-series Network Search Engine ICs and the Xilinx 200Gbps Programmable Packet Processor, built into a Xilinx Virtex-7 FPGA and generated by the Xilinx SDNet Development Environment. Using the Xilinx Vivado Design Suite, Renesas engineers developed a controller for the Network Search Engine IC as an IP block that’s also instantiated in the Virtex-7 FPGA. Here’s a block diagram of the system:

 

 

Renesas Deterministic Deep Database Search Engine .jpg 

 

 

Renesas is using its R8A20686BG-G 80Mbit Dual-Port Interlaken-LA TCAM to store search data. The device is designed for large table searches; is capable of performing 2 billion searches/sec; supports 80-, 160-, 320- and 640-bit search keys; and connects to a packet processor using 12-lane 10.1325/12.5Gbps Interlaken serial ports.

 

In this demo, the Renesas TCAM is connected to a Xilinx Eval Board carrying a Xilinx Virtex-7 FPGA. A custom Programmable Packet Processor created by the Xilinx SDNet development environment generates and feeds search keys to the Renesas device, which performs the searches in real time and passes search results back to the Programmable Packet Processor. A MicroBlaze RISC processor instantiated in the Virtex-7 FPGA handles table maintenance in the Renesas TCAM.

 

Here’s a photo of the working demo system:

 

 

Renesas Network Search Engine.jpg

 

 

 

The board on the left is the Xilinx Virtex-7 Eval Board and the board on the right has the Renesas S-series Network Search Engine IC. The boards are linked through a high-speed CFP cable, appearing at the bottom of the photo. The rainbow ribbon cable between the boards carries a low-speed housekeeping connection employed by the MicroBlaze processor instantiated in the Virtex-7 FPGA.