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Software Defined Specification Environment jams SDN into high gear by extending into the data plane

Xilinx Employee
Xilinx Employee
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The fastest way to define networking equipment using FPGAs

 

A month ago at the Xilinx Emerging Technology Symposium, Professor Nick McKeown said “SDN chips will look like FPGAs or something you can build from FPGAs. Network processing is embarrassingly parallel so you can exploit VLIW-like actions. The SDN compiler will convert target-independent specifications into target-dependent configurations.” Indirectly, McKeown was predicting the new Software Defined Specification Environment for Networking (SDNet) that Xilinx announced today at Interop.

 

The SDNet environment allows you to use high-level networking specifications to define packet-processing functions in a more natural way by describing the networking tasks to be performed without the need to define underlying implementation details. SDNet then automatically transforms the specification into an optimized hardware implementation that delivers line-rate performance based on Xilinx All Programmable devices.

 

System architects using SDNet need not understand how to use or even know about FPGAs; they only need to know about the networking tasks they want to implement.

 

The SDNet integrated development environment automatically generates:

 

  • Custom hardware components for specific functions (e.g., parsing, editing)
  • Custom packet data-plane hardware subsystems based on user requirements
  • Custom firmware for generated SDNet hardware architectures
  • Test benches for debugging and validation

 

Here’s a diagram showing a networking line-card implementation flow using SDNet and the Xilinx Vivado Design Suite:

 

 

SDNet Implementation Flow.jpg

 

 

Packet-processing architectures generated by the SDNet environment support hitless updates. That means that SDNet-defined data-plane processing functions can be modified on the fly between packets without disrupting line-rate service and without requiring network downtime for reconfiguration.

 

How revolutionary is Xilinx SDNet?

 

Here’s what Loring Wirbel, Senior Analyst at the Linley Group, wrote in his White Paper on SDNet:

 

“Because SDNet is agnostic to protocol, hardware implementation details, or performance scaling, its flexibility is unique in the industry. Many attempts have been made by academia, networking OEMs, NPU vendors, and EDA vendors to define packet description languages, parsing languages, and high-level tools to realize some of these capabilities in designing soft network elements. None, however, come close to matching the feature set of SDNet.”

 

Network reconfigurability using SDNet is fundamentally different from SDN, Software Defined Networks, because SDNet generates and manages both the control-plane and data-plane hardware and software configurations, as shown in this diagram comparing SDN with “Softly” Defined Networks, the Xilinx name for an SDNet-based network design:

 

 

SDNet compared with SDN 2.jpg
 

 

Want a demo? Xilinx Research Engineer Mike Attig shows you how easy and how fast it is to redefine a networking system on the fly using SDNet in this 3-minute video:

 

 

 

 

Note: Just the concept of redefining the design, compiling the new design, deploying the design in hardware, and collecting statistics on the new design in real time during a 3-minute video ought to give you some idea of how SDNet will revolutionize network equipment design.

 

Here’s Xilinx Vice President Nick Possley discussing how SDNet enables “Softly” Defined Networks, the benefits SDNet delivers to system architects, and why SDNet is revolutionary.

 

 

 


 

 

Finally, here’s Max Maxfield’s take on the SDNet announcement, posted on the EETimes’ Web site.

 

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