This design runs on an EMC² EMC2-ZU3EG Development Platform, which is based on a Xilinx Zynq Ultrascale+ ZU3EG MPSoC. A VITA57.1 FMC-compatible daughter card plugged to the EMC² Development Platform provides the HDMI input/output interface. Compute-intensive tasks are implemented in hardware using standard or custom IP cores and Vivado HLS. A Xilinx LogiCORE AXI VDMA IP core provides high-bandwidth memory access between the board’s DDR4 SDRAM and the HDMI peripherals.
Sundance Multiprocessor’s Hardware-Accelerated Sobel Filtering Demo running on the Xilinx Zynq UltraScale+ MPSoC
The project’s software was developed using the Xilinx SDSoC 2017.2 development environment. It’s a bare-metal application that executes on the Zynq UltraScale+ MPSoC’s Arm Cortex-A53 processor. The Sobel filter algorithm alternately runs unaccelerated on the Arm cortex-A53 processor and then with hardware acceleration using IP instantiated in the Zynq UltraScale+ MPSoC’s PL. The results are impressive:
Without hardware acceleration: 0.73fps
With hardware acceleration: 31fps
That’s a 42x speedup!
Here’s a simplified block diagram of the reference design’s hardware from Vivado 2017.2: