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AGGIOS Seed Energy Manager Provides software-Defined Power Management for Xilinx Zynq UltraScale+ MPSoC

by Xilinx Employee ‎11-12-2015 02:20 PM - edited ‎01-06-2016 10:59 AM (25,343 Views)

 

Yesterday, AGGIOS announced its Seed Energy Manager, which provides software-defined power management for the Xilinx Zynq UltraScale+ MPSoC. I saw this new power-management tool in action yesterday at ARM TechCon in Silicon Valley. In conjunction with the company’s EnergyLab energy management synthesis tool, Seed Energy Manager gives you remarkably simple control over the power consumption of complex, multi-processor systems based on the Zynq MPSoC. “The Xilinx Zynq MPSoC is an ideal target for our software-defined power management solutions because of the levels of multiprocessing complexity it handles and the critical importance of optimizing power for the whole application," said Dr. Vojin Zivojnovic, CEO of AGGIOS.

 

The EnergyLab tool allows you to define the independent blocks in your system so that you can compute the energy savings when you turn them off. EnergyLab then creates an abstracted system description in UHAL, a Unified Hardware Abstraction Layer, that Seed Energy Manager uses to develop power-management strategies based on the system’s actual resource usage. The Seed Energy Manager:

 

  • Detects and responds to power management directives by the various OSes running on the various system processors even during power transitions
  • Manages the device’s and system’s sleep, suspend, and dark wake states
  • Coordinates power state changes for components, clusters, and subsystems
  • Manages UHA operating points and scenes as required by the running application(s)
  • Executes control code to retain state information during power transitions
  • Changes power states by directly accessing hardware components—including clock dividers, PLLs and PMICs
  • Provides run-time power and energy estimates

 

Davorin Mista, co-founder and VP of Engineering of AGGIOS, gave me an impressive demo in the AGGIOS booth at ARM TechCon. The company is using one of the Zynq MPSoC boards I wrote about earlier in the Xcell Daily blog. (See “Lift-off! 16nm Zynq UltraScale+ MPSoC ships to customers. From tapeout to “Hello World” in 2.5 months.”)

 

 

AGGIOS Demo ARM TechCon.jpg

 

 

AGGIOS Software-Defined Radio Power Demo using Zynq UltraScale+ MPSoC at ARM TechCon

 

 

 

AGGIOS is clearly taking advantage of many of the power-management features inside of the Zynq MPSoC. Equally clearly, AGGIOS has gotten a lot of early information about the Zynq MPSoC’s power management system from Xilinx and is making excellent use of that information.

 

I was particularly impressed with Seed Energy Manager’s ability to entirely shut down and power down the Zynq MPSoC’s FPGA fabric when not needed and then automatically repower and re-configure the FPGA in a matter of 20msec or so when needed. This is exactly the sort of ability you want in power-constrained applications—and today, what applications are not power constrained?

 

The Xilinx Zynq UltraScale+ MPSoC is a complex device with its four ARM Cortex-A53 application processors, two ARM Cortex-R5 real-time processors, and various other specialized processors not to mention the attached FPGA. You are going to need a tool like the AGGIOS Seed Energy Manager, so why not take a look?

 

 

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About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.