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Adam Taylor’s MicroZed Chronicles, Part 128: Out-Of-Context Compilation using Vivado HLx

by Xilinx Employee on ‎04-25-2016 10:34 AM (19,341 Views)

 

By Adam Taylor

 

This is another blog that I should have written much sooner. While working with the Avnet EVK (Embedded Vision Kit), it has become apparent that compilation times can sometimes become excessively long. This is especially frustrating when we only change one little area of a design. So I am going to explain what Out-Of-Context (OOC) compilation is and how it saves time in our build process, which is important because it helps us become even more productive.

 

Vivado provides us three options when it comes to synthesis:

 

  • Global – Performs a traditional top-down synthesis of the entire design. Selecting this option takes the longest time because you need to re run the entire synthesis every time you make a change.

 

  • OOC-IP – Runs synthesis and creates a Design Check Point (DCP) for every individual IP block within your design. These check points are then collected into a black-box at the top level implementation. Using this option means that only the blocks you actually change need to be re-synthesised, which saves time. OOC-IP also creates an IP customization file (XCI) for each IP block, allowing for customization and OOC XDC files. OOC-IP is the default setting for synthesis within Vivado. This option applies to all IP within the block diagram. You cannot individually select IP blocks with this option.

 

  • OOC-Block – Very similar to the OOC-IP option however this option allows you to define the entire block diagram as OOC. This option has two main uses: you can use it with external synthesis tools, or there’s another aspect we can use for this option that I will expand on later.

 

 

There a number of different ways we can select the synthesis option we want. The most obvious way is when we generate the output products for a block diagram. Vivado will pop up a box very similar to the one below, allowing you easily to select your choice.

 

 

Image1.jpg

 

Pop-Up window with Synthesis Option Selection

 

 

Alternatively, if you are designing with a pure HDL design you can also right click on the HDL design file and select “Set as Out-Of-Context For Synthesis” from the available options, which then provides a pop-up box where you can configure the settings and provide a path to the desired OOC XDC files needed.

 

 

Image2.jpg

 

Configuring the HDL OOC

 

 

Within the sources window of Vivado HLx you can see if a module is configured for OOC compilation. It will have a yellow box by its name.

 

 

Image3.jpg

 

Identifying OOC configured blocks and files

 

 

One interesting thing that the OOC-Block option allows you to do is create a block diagram with the core of your design, synthesize it using the OOC Block design, and then add in another top-level file that contains both the OOC Block and other modules that add functionality either through HDL code or block diagrams. This approach to synthesis saves considerable compilation time, as shown in the diagram above. All you do need to do is create your own top-level HDL file that ties everything together.

 

There are a couple of potential areas where you need to be careful when using the OOC-IP flow. The first arises when you use your own IP modules packaged within an OOC-IP flow. You need to ensure these modules are correctly defined not to use the OOC-IP flow. If you get error project 1-486 during implementation, you have likely made this mistake.

 

The second is with OOC-IP flow, which is bottom up. So if there are customized generics at a higher level, Vivado HLx will use the default settings. Consequently, the synthesis behavior may not be as you want.

OOC can save considerable time in our implementation flow. For further reading check out the following user guides:

 

 

 

 

 

The code is available on Github as always.

 

If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.

 

 

 

  • First Year E Book here
  • First Year Hardback here.

 

 

 

 MicroZed Chronicles hardcopy.jpg

 

 

  • Second Year E Book here
  • Second Year Hardback here

 

 

 MicroZed Chronicles Second Year.jpg

 

 

 

You also can find links to all the previous MicroZed Chronicles blogs on my own Web site, here.

 

 

 

 

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About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.