UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Adam Taylor’s MicroZed Chronicles, Part 133: Building our first project using NI LabVIEW FPGA

by Xilinx Employee ‎06-06-2016 09:49 AM - edited ‎06-06-2016 11:58 AM (7,923 Views)

 

By Adam Taylor

 

Having run through a few of the simple examples supplied with the evaluation board, I thought it would be a good idea to try and create my own from scratch so that I understood how the project came together. To do this we are going to create a very simple project that lighta a LED when we push one a button. Very simple, but it will show us the flow.

 

First we need to create a new project. We can do this within LabVIEW by selecting file -> new project and then creating an empty project.

 

 

Image1.jpg

 

 

Once we have created the project, we need to configure it to use the evaluation board that we are using. This requires that we first find the target hardware. We do this by right-clicking on the project and selecting “new targets and devices.”

 

 

 

Image2.jpg

 

 

 

This will open a dialog box where we can select the type of hardware we are using. If we are already connected to the eval board, then we can enter the IP address, in my case 172.22.11.2, which makes identifying the board much easier.

 

 

Image3.jpg

 

 

Once that has been completed we will see the target hardware and the Chassis appear within our project. (Check that the IP address is correct. If not you can update this via the targets property settings.)

 

 

Image4.jpg

 

 

 

Under the Chassis, you will see the connections that are available in the design under the Connector0 and Connector1 directories. Unlike in the previous example, these eval board connections are not defined. We’ve not yet done that. However, we know that the middle push button (marked PB3 on the eval board) is connected to DIO14 and LED1 is connected to DIO4.

 

To use these connections in our design, we are going to first need to add a VI into our project. We need to do this in the right place. Right-click on the FPGA target and select “add new VI.” This will open two windows in the block diagram where we can add to our design and to the User interface. At the moment we are not going to use the User interface except to run the design. Within the block diagram we are going to simply connect the push button to the LED output and then build the design.

 

To do this within the LabVIEW project explorer, we expand connector1 and drag and drop DIO4 and DIO14 onto our block diagram. DIO14 is the input and DIO4 is the output. On the block diagram, each of these will show as a FPGA I/O node. Each node has three terminals: FPGA In, FPGA Out, and IO Item. For this example, we will be using the IO Item, which is the data read from the I/O pin or the data to be written to the I/O pin. We can change the IO Item’s mode (and the side of the block it is on) by right-clicking on it and selecting “set read” or “set write” mode. My design can be seen below. Complicated it is not.

 

 

Image5.jpg

 

 

Once we have completed the design, we need to generate an FPGA bit file that we can use on our eval board. The first thing to do is save the block diagram and then click on the run arrow. This will cause a dialog box to appear that asks how you want to generate your FPGA bit file. We can choose to do this locally or in the cloud. For this instance I am going to use the cloud.

 

 

Image6.jpg 

 

 

This will start the compile server and generate the bit file needed to program the FPGA. You can watch the progress as shown below:

 

 

Image7.jpg

 

 

Once this compilation completes, we can click run again (I recommend run continuously in this case) and the application will be downloaded to the eval board. You will now see the LED light up when you push the middle button on the eval board.

 

If we change the design, the next time we click run we again see the request regarding compilation and design will be recompiled before it is run again.

 

All told, this was very simple to get up and running. Now we are ready to look at more advanced applications using this toolset.

 

 

 

The code is available on Github as always.

 

If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.

 

 

 

  • First Year E Book here
  • First Year Hardback here.

 

 

 MicroZed Chronicles hardcopy.jpg

 

 

 

  • Second Year E Book here
  • Second Year Hardback here

 

 

MicroZed Chronicles Second Year.jpg

 

Labels
About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.