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Adam Taylor’s MicroZed Chronicles Part 146: Cracking Open HLS, Part 3

by Xilinx Employee on ‎09-06-2016 11:01 AM (4,240 Views)

 

By Adam Taylor

 

 

So far we have examined the basics of Vivado HLS (high-level synthesis) and how we can define the interface we want on the resultant IP module. But what about the functionality we desire within the module itself? With a traditional HDL design, we could design it all ourselves from scratch. However, when we develop traditional HDL designs we normally use IP blocks where possible and create new modules only when they add value. When it comes to using HLS we need to follow a similar approach, as opposed to writing everything from scratch.

 

 

Image1.jpg

 

The IP Module we will create over the next few blogs

 

 

Vivado HLS provides several libraries that allow us to use canned functions to implement the more commonplace aspects of a design and to develop new code only when we can add value. What differs from HDL development is that Vivado HLS gives us the benefits of working with a higher abstraction level so that we can develop new code more efficiently, more cost effectively, and far more quickly.

 

We get six standard libraries with our HLS installation. These libraries provide a range of functions:

 

  • Math Library – Provides synthesisable implementations of the standard math libraries.
  • Video Library – Provides video-processing libraries similar to OpenCV.
  • IP Library – Provides IP libraries for implementing FFT, FIR, and Shift Register LUT functions.
  • Linear Algebra Library – Provides a library of commonly used Linear Algebra functions.
  • Stream Library – Provides structures for modelling streaming data interfaces.
  • Arbitrary Precision Data Types Library – Provides support for non-power-of-2, arbitrary length data using signed and unsigned integers. This library allows us to use the FPGA’s resources more efficiently.

 

We are now going to explore the Video Library in depth. The Vivado HLS Video Library includes a range of functions including the equivalent of an OpenCV library to help us test and implement embedded-vision systems. The Vivado HLS Video Library provides similar functions to those provided by OpenCV but it’s not possible to perform HLS synthesis directly on OpenCV libraries because they are not optimized for FPGA implementation due to their use of dynamic memory allocation. This Video Library will allow us to accelerate development of an image-processing pipeline.

 

We’ll be using the Avnet Embedded Vision Kit to demonstrate the functionality of the IP blocks in programmable logic. The HLS environment provides two libraries we can use to develop our embedded-vision application:

 

  • hls_video – This library provides embedded-vision functions and data structures. These elements can be synthesized.
  • hls_opencv – This library includes pre-compiled OpenCV functions along with special support functions required to interface with the IP module. This library is intended for use by a test bench and as such is not synthesizable.

 

We can develop at a high level using our HLS environment, initially using the hls_opencv library to prototype the algorithm. This allows us to quickly and easily create the system model of the algorithm within our HLS environment and verify that results meet requirements. 

 

Over the next few blogs we are going to look more into these video libraries and create a simple image processing module we can implement.

 

 

Code is available on Github as always.

 

If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.

 

 

 

  • First Year E Book here
  • First Year Hardback here.

 

 

 MicroZed Chronicles hardcopy.jpg

 

 

 

  • Second Year E Book here
  • Second Year Hardback here

 

 

 

 MicroZed Chronicles Second Year.jpg

 

 

 

All of Adam Taylor’s MicroZed Chronicles are cataloged here.

 

 

 

 

 

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About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.