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Adam Taylor’s MicroZed Chronicles, Part 160: Creating an SDSoC Platform for PYNQ

by Xilinx Employee on ‎12-12-2016 10:46 AM (38,064 Views)

 

By Adam Taylor

 

As I described last week, we need to a platform to fuse Python and SDSoC. In the longer term, I want to perform some image processing with this platform. So although I am going to remove most of the logic from the base design, we need to keep the following in the hardware to ensure that we can correctly boot up the Pynq board:

 

  1. SWSled GPIO
  2. Btns GPIO
  3. RGBLeds GPIO
  4. Block Memory – Added in the MicroZed Chronicles, Part 158

 

We will leave the block memory within the design to demonstrate that the build produced by SDSoC is unique and different when compared to the original boot.bin file. Doing so will enable us to use the notebook we previously used to read and write the Block RAM. However this time we will not need the overlay first.

 

 

Image1.jpg

 

 

Stripped Down Vivado Platform

 

 

As we know by now, we need to have two elements to create an SDSoC hardware definition and a software definition. We can create the hardware definition within Vivado itself. This is straightforward. We declare the available AXI ports, clocks, and interrupts. I have created a script to do. It’s available on the GitHib repository. You can run this in the command line of the TCL console within Vivado.

 

The software definition will take a little more thought. Because we are using a Linux-based approach, we need the following:

 

  • uImage – The Pynq Kernel
  • dtb – The device tree blob
  • elf – The first-stage boot loader
  • elf – The second-stage boot loader
  • bif – Used to determine the boot order

 

 

We can obtain most of these items from the Pynq Master that we downloaded from GitHib previously under the file location:

 

 

<Path>/PYNQ-master/PYNQ-master/Pynq-Z1/sdk/bootbin

 

 

Within this directory, you can find the FSBL, device tree, Uboot, and a boot.bif. What is missing however is the actual Linux kernel: the uImage. We already have this image on the SD card we have been running the PYNQ from recently. I merely copied this file into the SDSoC platform directory.

 

With the platform defined, we can create a simple program that does not have any accelerators and we can use SDSoC to build the contents of the SD Card. Once built we can copy the contents to the SD Card and boot the PYNQ. We should see the LED’s flash as normal when the Pynq is ready for use.

 

We should be able to access the BRAM we have left within the design using the same notebook as before, but with the overlay section commented out. You should be able to read and write from the memory. You’ll should also check to see that if you change the base address from the correct address, the notebook will no longer work correctly.

 

Having proved that we can build a design without accelerating a function, the next step is to ensure that we can build a design that does accelerate a function. I therefore used the matrix multiply example to generate a simple example that shows how you to correctly use the platform to accelerate hardware. This is the final confirmation we need to confirm that we have defined the platform correctly.

 

Creating a new project, targeting the same platform as before, with the example code, and targeting the generation of a shared library produced the following hardware build in Vivado:

 

 

Image2.jpg

 

 

 

MMult hardware example as created by SDSoC

 

 

 

Clearly, we can see the addition of the accelerated hardware.

 

All that is needed now is to upload the bit, tcl, and so files to the PYNQ and then write a notebook to put them to work.

 

 

Code is available on Github as always.

 

If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.

 

 

 

  • First Year E Book here
  • First Year Hardback here.

 

 

 

MicroZed Chronicles hardcopy.jpg 

 

 

  • Second Year E Book here
  • Second Year Hardback here

 

 

 

MicroZed Chronicles Second Year.jpg 

 

 

 

All of Adam Taylor’s MicroZed Chronicles are cataloged here.

 

 

 

 

 

 

 

Comments
by Observer imranashraf
on ‎05-20-2017 09:30 AM

Nice writeup,  but it is quite abstract to a new user like me who is trying to follow it to generate a custom acclerator with sdsoc for pynq board. For instance you mention HW platform generation, but do not mention what will be the output hardware plateforms file(s) which will be later fed to sdsoc. Simmilarly, you mention things required for SW platform generation quite clearly but you do not mention where they should be placed or how to instruct sdsoc about the generated hw and sw platforms.

 

You also mention a script, but there is not script with some name *part160*.tcl on github.

 

Do you detail these steps in the book being sold?

 

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  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.