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Adam Taylor’s MicroZed Chronicles Part 194: A Zynq UltraScale+ MPSoC Interrupt & GPIO example

by Xilinx Employee ‎05-15-2017 09:05 AM - edited ‎05-16-2017 11:23 AM (1,418 Views)


By Adam Taylor


I have previously discussed the Zynq UltraScale+ MPSoC’s interrupt architecture, so this blog will show you how to use these interrupts in a simple example. To do this we are going to use the push button and the LED on the Avnet UltraZed Starter Kit. These peripherals are connected to the Zynq MPSoC’s PS MIO. We will configure the system so that pressing the button generates an interrupt, causing the Zynq MPSoC to toggle the LED on and off.


We are using the UltraZed SoM on the UltraZed IOCC (I/O Carrier Card), so the push button is connected to MIO 26 while the LED is connected to MIO 31. Within Vivado, you can see what each MIO is used for and, if necessary, configure it on the IO configuration tab of the MPSoC Customization wizard. Both of the MIO signals used in this example are on MIO bank 1 and, because we used Vivado’s the board automation when we instantiated the MPSoC in our block diagram, the MIO and PS are already configured correctly for both the SoM and the IOCC.






MIO configuration on the MPSoC PS




Because we are using the MIO for this example, we can use the existing Vivado MPSoC design that we’ve been using to date. The main work to get this example up and running will be within SDK, where we need to do the following:


  • Initialize and configure the GPIO Controller – MIO pin 26 is configured as an input while MIO pin 31 is configured and enabled as an output


  • Initialize and configure the Interrupt Controller – After we have initialized the GIC, we need to configure the GPIO to generate an interrupt when the button was pushed. Within this function, we also need to identify which function is to be called when the interrupt occurs.


  • Create an Interrupt Service Routine – This is the function that is executed when a GPIO interrupt is detected. This function reads the status of the interrupt pin, and toggles the LED state. As it is toggled, the LED state will be echoed to a local terminal. There is a delay within this ISR to de-bounce the switch, which prevents rapidly changing values on the switch input from changing the LED status multiple times.





Example running on the MPSoC



To implement this example and write the elements identified above, we will need to use functions contained with the Xilinx PS GPIO, PS Generic Interrupt Controller and Exception drivers. These were created when we established our BSP.


I have uploaded the source code and the bin file to the GitHub repository. If you are using a different board than the UltraZed IOCC, you can modify this example very simply. To do this you need to  change the input and output pin and bank mapping to the MIO allocations as used on your board, assuming there is a switch and LED connected to the MIO.





GPIO Bank and MIO Pin numbers to be updated in the source code for different boards




Once you have updated the source code example for your board, all you need to do is rebuild the project and run it on your hardware.



Code is available on Github as always.


If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.




  • First Year E Book here
  • First Year Hardback here.



MicroZed Chronicles hardcopy.jpg 



  • Second Year E Book here
  • Second Year Hardback here



MicroZed Chronicles Second Year.jpg 


About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.