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Adam Taylor’s MicroZed(ish) Chronicles Part 81: Simple Communication Interfaces

by Xilinx Employee ‎05-11-2015 10:15 AM - edited ‎05-11-2015 10:15 AM (45,157 Views)

 

By Adam Taylor

 

So far in this journey we have looked at getting data on and off the MicroZed board using Ethernet. We have not looked at communicating with on-board peripherals: real time clocks, non-volatile memories, and unique sensors. These communications often employ either I2C or SPI. Here’s a look at both:

 

  • SPI (Serial Peripheral Interface) is a serial, 4-wire, full-duplex interface originally developed by Motorola Semiconductor. It subsequently developed into a de facto standard and is commonly used for intra-module communication—i.e. transferring data between peripherals and the processor or FPGA within the same module. SPI is often used for semiconductor memories, ADC’s, CODECs, MMC and SD memory cards. The SPI system architecture consists of a single master or multiple masters and one or more slaves.

 

  • The I2C (Inter-Integrated Circuit, usually pronounced “I-squared-C”) interface is a multi-master, 2-wire, serial bus developed by Phillips in the early 1980’s with a purpose similar to Motorola’s SPI. Only half-duplex mode is possible with I2C due to its 2-wire nature. The advantage: you save two pins—and in the 1980s, when a 40-pin DIP was considered “large,” saving two pins was a lot more important than it is today. The I2C standard persists because it’s economical and useful.

 

The Zynq SoC’s PS (processor system) incorporates two I2C and two SPI peripheral interfaces, which can be routed through either the MIO or the Zynq PL’s (Programmable Logic’s) EMIO as shown below:

 

 

Image1.jpg

 

 

A great example of using SPI on the ZedBoard is to drive and configure an OLED display. While there is no OLED on the MicroZed, we can easily use a Digilent OLED PMOD. We just need to map our I/O pins.

 

 

Image2.jpg 

 

Digilent OLED PMOD module

 

 

 

The MicroZed communicates with the OLED via SPI. However it requires a few other command signals to correctly interface with the device: a Power Enable, OLED Enable, and a Data / Command identifier line. The communication protocol appears in the interface diagram below:

 

 

 

 Image3.jpg

 

 

Correctly driving the OLED requires the following pins:

 

 

 

Name

ZedBoard Pin

Function

VDD

U12

Controller PSU Enable

VBAT

U11

OLED PSU Enable

RES

U9

Reset Active Low

D/C

U10

Data / Control (Low)

SCK

AB12

SPI Clk

SDO

AA12

SPI Data

 

 

 

To implement the OLED display, I instantiated a new Vivado design based on the ZedBoard, enabled SPI 0, and connected it to the EMIO, not the GPIO. I also defined four GPIO EMIO pins that can be used for the remainder of the interface to the OLED.

 

 

Image5.jpg 

 

 

This can be seen in the block diagram below:

 

 

Image6.jpg

 

 

Before we can build the system, export the hardware, and develop the application software to control our SPI application, we must define the SPI clock frequency. This task is split between Vivado and SDK, so I will need to explain what’s needed.

 

Open the Zynq Processing System customization from within your block diagram and select “Clock Configuration.” On the basic clocking tab, under the IO Peripherals, you will see SPI clocking. This option gives you the ability to select a PLL (in this case the IO PLL), a requested frequency, and the actual frequency. In my system, the requested and actual frequencies are 166 MHz and 160 MHz respectively. Clicking on the “Advance Clocking” tab displays more information.

 

 

 Image7.jpg

 

 

In this case the IO PLL multiplies the 33.333MHz input clock frequency (shown at the top of the figure) by 48 to achieve a PLL frequency of 1600MHz, which is then divided by 10—taken from the “first divisor” field on the SPI peripheral clock line in the above table—to generate the 160MHz SPI clock. Selecting the “override” allows us to change these numbers. However care must be taken when doing this. Combined with the baud rate divider, which we set in the SPI configuration register, we can set the SPI frequency most suitable for our target peripheral. In the case of the OLED, we need to operate below 3MHz, so we will use a divider of at least 64 to take the 160MHz clock below 3MHz.

 

The next blog in this series will look at the related software development.

 

 

 

 

 

 MicroZed Chronicles.jpg

 

 

 

 

Now, you can have convenient, low-cost Kindle access to the first year of Adam Taylor’s MicroZed Chronicles for a mere $7.50. Click here.

 

Please see the previous entries in this MicroZed Chronicles series by Adam Taylor:

 

Adam Taylor’s MicroZed Chronicles Part 80: LWIP Stack Configuration

 

Adam Taylor’s MicroZed Chronicles Chronicles Part 79: Zynq SoC Ethernet Part III

 

Adam Taylor’s MicroZed Chronicles Chronicles Part 78: Zynq SoC Ethernet Part II

 

Adam Taylor’s MicroZed Chronicles Microzed Chronicles Part 77 – Introducing the Zynq SoC’s Ethernet

 

Adam Taylor’s MicroZed Chronicles Part 76: Constraints for Relatively Placed Macros

 

Adam Taylor’s MicroZed Chronicles, Part 75: Placement Constraints – Pblocks

 

Adam Taylor’s MicroZed Chronicles, Part 73: Physical Constraints

 

Adam Taylor’s MicroZed Chronicles, Part 73: Working with other Zynq-Based Boards

 

Adam Taylor’s MicroZed Chronicles, Part 72: Multi-cycle Constraints

 

Adam Taylor’s MicroZed Chronicles, Part 70: Constraints—Clock Relationships and Avoiding Metastability

 

Adam Taylor’s MicroZed Chronicles, Part 70: Constraints—Introduction to timing and defining a clock

 

Adam Taylor’s MicroZed Chronicles Part 69: Zynq SoC Constraints Overview

 

Adam Taylor’s MicroZed Chronicles Part 68: AXI DMA Part 3, the Software

 

Adam Taylor’s MicroZed Chronicles Part 67: AXI DMA II

 

Adam Taylor’s MicroZed Chronicles Part 66: AXI DMA

 

Adam Taylor’s MicroZed Chronicles Part 65: Profiling Zynq Applications II

 

Adam Taylor’s MicroZed Chronicles Part 64: Profiling Zynq Applications

 

Adam Taylor’s MicroZed Chronicles Part 63: Debugging Zynq Applications

 

Adam Taylor’s MicroZed Chronicles Part 62: Answers to a question on the Zynq XADC

 

Adam Taylor’s MicroZed Chronicles Part 61: PicoBlaze Part Six

 

Adam Taylor’s MicroZed Chronicles Part 60: The Zynq and the PicoBlaze Part 5—controlling a CCD

 

Adam Taylor’s MicroZed Chronicles Part 59: The Zynq and the PicoBlaze Part 4

 

Adam Taylor’s MicroZed Chronicles Part 58: The Zynq and the PicoBlaze Part 3

 

Adam Taylor’s MicroZed Chronicles Part 57: The Zynq and the PicoBlaze Part Two

 

Adam Taylor’s MicroZed Chronicles Part 56: The Zynq and the PicoBlaze

 

Adam Taylor’s MicroZed Chronicles Part 55: Linux on the Zynq SoC

 

Adam Taylor’s MicroZed Chronicles Part 54: Peta Linux SDK for the Zynq SoC

 

Adam Taylor’s MicroZed Chronicles Part 53: Linux and SMP

 

Adam Taylor’s MicroZed Chronicles Part 52: One year and 151,000 views later. Big, Big Bonus PDF!

 

Adam Taylor’s MicroZed Chronicles Part 51: Interrupts and AMP

 

Adam Taylor’s MicroZed Chronicles Part 50: AMP and the Zynq SoC’s OCM (On-Chip Memory)

 

Adam Taylor’s MicroZed Chronicles Part 49: Using the Zynq SoC’s On-Chip Memory for AMP Communications

 

Adam Taylor’s MicroZed Chronicles Part 48: Bare-Metal AMP (Asymmetric Multiprocessing)

 

Adam Taylor’s MicroZed Chronicles Part 47: AMP—Asymmetric Multiprocessing on the Zynq SoC

 

Adam Taylor’s MicroZed Chronicles Part 46: Using both of the Zynq SoC’s ARM Cortex-A9 Cores

 

Adam Taylor’s MicroZed Chronicles Part 44: MicroZed Operating Systems—FreeRTOS

 

Adam Taylor’s MicroZed Chronicles Part 43: XADC Alarms and Interrupts 

 

Adam Taylor’s MicroZed Chronicles MicroZed Part 42: MicroZed Operating Systems Part 4

 

Adam Taylor’s MicroZed Chronicles MicroZed Part 41: MicroZed Operating Systems Part 3

 

Adam Taylor’s MicroZed Chronicles MicroZed Part 40: MicroZed Operating Systems Part Two

 

Adam Taylor’s MicroZed Chronicles MicroZed Part 39: MicroZed Operating Systems Part One

 

Adam Taylor’s MicroZed Chronicles MicroZed Part 38 – Answering a question on Interrupts

 

Adam Taylor’s MicroZed Chronicles Part 37: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 8

 

Adam Taylor’s MicroZed Chronicles Part 36: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 7

 

Adam Taylor’s MicroZed Chronicles Part 35: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 6

 

Adam Taylor’s MicroZed Chronicles Part 34: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 5

 

Adam Taylor’s MicroZed Chronicles Part 33: Driving Adafruit RGB NeoPixel LED arrays with the Zynq SoC

 

Adam Taylor’s MicroZed Chronicles Part 32: Driving Adafruit RGB NeoPixel LED arrays

 

Adam Taylor’s MicroZed Chronicles Part 31: Systems of Modules, Driving RGB NeoPixel LED arrays

 

 Adam Taylor’s MicroZed Chronicles Part 30: The MicroZed I/O Carrier Card

 

Zynq DMA Part Two – Adam Taylor’s MicroZed Chronicles Part 29

 

The Zynq PS/PL, Part Eight: Zynq DMA – Adam Taylor’s MicroZed Chronicles Part 28  

 

The Zynq PS/PL, Part Seven: Adam Taylor’s MicroZed Chronicles Part 27

 

The Zynq PS/PL, Part Six: Adam Taylor’s MicroZed Chronicles Part 26

 

The Zynq PS/PL, Part Five: Adam Taylor’s MicroZed Chronicles Part 25

 

The Zynq PS/PL, Part Four: Adam Taylor’s MicroZed Chronicles Part 24

 

The Zynq PS/PL, Part Three: Adam Taylor’s MicroZed Chronicles Part 23

 

The Zynq PS/PL, Part Two: Adam Taylor’s MicroZed Chronicles Part 22

 

The Zynq PS/PL, Part One: Adam Taylor’s MicroZed Chronicles Part 21

 

Introduction to the Zynq Triple Timer Counter Part Four: Adam Taylor’s MicroZed Chronicles Part 20

 

Introduction to the Zynq Triple Timer Counter Part Three: Adam Taylor’s MicroZed Chronicles Part 19

 

Introduction to the Zynq Triple Timer Counter Part Two: Adam Taylor’s MicroZed Chronicles Part 18

 

Introduction to the Zynq Triple Timer Counter Part One: Adam Taylor’s MicroZed Chronicles Part 17

 

The Zynq SoC’s Private Watchdog: Adam Taylor’s MicroZed Chronicles Part 16

 

Implementing the Zynq SoC’s Private Timer: Adam Taylor’s MicroZed Chronicles Part 15

 

MicroZed Timers, Clocks and Watchdogs: Adam Taylor’s MicroZed Chronicles Part 14

 

More About MicroZed Interrupts: Adam Taylor’s MicroZed Chronicles Part 13

 

MicroZed Interrupts: Adam Taylor’s MicroZed Chronicles Part 12

 

Using the MicroZed Button for Input: Adam Taylor’s MicroZed Chronicles Part 11

 

Driving the Zynq SoC's GPIO: Adam Taylor’s MicroZed Chronicles Part 10

 

Meet the Zynq MIO: Adam Taylor’s MicroZed Chronicles Part 9

 

MicroZed XADC Software: Adam Taylor’s MicroZed Chronicles Part 8

 

Getting the XADC Running on the MicroZed: Adam Taylor’s MicroZed Chronicles Part 7

 

A Boot Loader for MicroZed. Adam Taylor’s MicroZed Chronicles, Part 6 

 

Figuring out the MicroZed Boot Loader – Adam Taylor’s MicroZed Chronicles, Part 5

 

Running your programs on the MicroZed – Adam Taylor’s MicroZed Chronicles, Part 4

 

Zynq and MicroZed say “Hello World”-- Adam Taylor’s MicroZed Chronicles, Part 3

 

Adam Taylor’s MicroZed Chronicles: Setting the SW Scene

 

Bringing up the Avnet MicroZed with Vivado

 

 

 

 

 

 

 

Comments
by Scholar ronnywebers
on ‎05-12-2015 02:07 AM

Hello Adam,

 

thanks again for the great blog! I happen to be working on an SPI interface through EMIO pins with an SPI DAC (write only device, so no MISO pin)

 

if you 'open-click' the SPI_0 port on the Zynq in the Block Design, I found many ports that can be made external or not. I can see you're leaving the unused pins 'unconnected'. 

 

Also I read in the TRM par 17.5.4 : IMPORTANT: When using EMIO pins, tie SSIN High in the PL bitstream. Ensure that the PS–PL voltage level shifters are enabled, and that the PL is powered and configured. Otherwise the SPI controller will
not function properly.

 

So i connected a 'constant' to the SPI0_SS_I pin

 

As you see in my screenshot, I did connect a 'constant' value to someother  signals that I though would give me a more 'deterministic' system (liks '0' on the MISO line).

 

SPI interface.jpg

 

 

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About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.