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Everspin’s new MRAM-based nvNITRO NVMe card delivers Optane-crushing 1.46 million IOPS (4Kbyte, mixed 70/30 read/write)

by Xilinx Employee ‎08-09-2017 04:22 PM - edited ‎08-09-2017 04:23 PM (13,964 Views)


This week, Everspin launched its line of MRAM-based nvNITRO NVMe Storage Accelerator cards with an incredible performance spec: up to 1.46 million IOPS for random 4Kbyte mixed 70/30 read/write operations. In the world of IOPS, that’s very fast. In fact it’s roughly 3x faster than an Intel P4800X Optane SSD card, which is spec’ed at up to 500K IOPS for random 4Kbyte mixed 70/30 read/write operations. Multiple factors contribute to the nvNITRO Storage Accelerator’s speed including Everspin’s new 1Gbit Spin Torque Magnetorestrictive RAM (ST-MRAM) with high-speed, DDR4, SDRAM-compatible I/O; a high-performance, MRAM-specific memory controller IP block compatible with NVMe 1.1+; and the Xilinx Kintex UltraScale KU060 FPGA that implements the MRAM controller and the board’s PCIe Gen3 x8 host interface. Everspin’s nvNITRO NVMe cards will ship in Q4 of 2017 and will be available in 1 and 2Gbyte capacities.



Everspin nvNITRO NVMe card.jpg


Everspin’s nvNITRO NVMe card



Nonvolatile MRAM delivers several significant advantages over other memory technologies used to implement NVMe cards. It’s non-volatile, so no backup power is needed. In addition, ST-MRAM has very high endurance (see chart below), so the nvNITRO card accommodates unlimited drive writes per day, eliminates the need for wear-leveling algorithms that steal memory cycles in NAND-Flash storage, and exhibits no degradation in read/write performance over time.



Everspin ST-MRAM endurance and write speed.jpg



Everspin’s ST-MRAM has low write times and high write endurance




So much for the chart’s Y axis. You can see from the X axis that Everspin’s ST-MRAM has a very fast write speed—it’s about as fast as DRAM—which is one reason that the nvNITRO Storage Accelerator has such fast read/write performance.


There’s one more line in the Everspin nvNITRO NVMe Storage Accelerator’s data sheet that’s worth mentioning:



“Customer-defined features using own RTL with programmable FPGA”



There appears to be room for your own custom code in that Kintex UltraScale KU060 FPGA that implements the PCIe interface and ST-MRAM controller on the nvNITRO Storage Accelerator card. You can add your own special sauce to the design with no incremental BOM cost. Try doing that with an ASSP!


About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.