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Getting the Most out of Your PicoBlaze Microcontroller

by Xilinx Employee on ‎11-11-2014 03:03 PM (23,210 Views)


By Adam P. Taylor, Head of Engineering – Systems, e2v



The PicoBlaze is a compact 8-bit soft-core microcontroller that FPGA engineers instantiate within their selected Xilinx FPGA. Once implemented, this core is completely contained within the FPGA fabric using only logic slices and Block RAMs; it requires no external volatile or nonvolatile memory.


Thanks to its small implementation footprint, it is possible for an FPGA to contain multiple PicoBlaze instantiations, with each instantiation used to implement control structures typically created by state machines. The result is a reduction in the development time along with a standardized approach to control structure generation. Thanks to the underlying high performance of the Xilinx FPGA fabric, PicoBlaze instantiations are often capable of outperforming many discrete 8-bit microcontrollers.


Let’s take a look at how we can best utilize this handy device within our designs.





Before we can use the core, it is first a good idea to understand a little about its architecture. PicoBlaze is a very simple 8-bit microcontroller that is based around a RISC architecture (see Figure 1 below). The controller has a 12-bit address port, which means it can address as many as 4,096 memory locations. Each address location contains an 18-bit instruction that defines the operation the core must perform. Inputs and outputs to and from the core are possible via two 8-bit ports (one input, one output). The controller also provides an 8-bit identification port, allowing for up to 256 peripherals to be read from or written to. There is also a size-selectable scratchpad that can be 64, 128 or 256 bytes. As with all micros, PicoBlaze contains an arithmetic logic unit and support for one interrupt. These capabilities mean the controller offers many advantages to the FPGA design engineer.



 PicoBlaze Block Diagram.jpg


One of the most important aspects of PicoBlaze is its highly deterministic nature, which means all instructions require two clock cycles for execution and interrupts are serviced with four clock cycles maximum.





FPGA applications usually require a combination of parallel and sequential operations, with data flow being predominantly parallel and control structures predominantly implemented as sequential structures, for example state machines (see Xcell Journal issue 81, “How to Implement State Machines in Your FPGA”). However, complex control structures if implemented as a state machine can become unwieldy, increasing the verification time and making modifications later in the development cycle more difficult. Complicated state machines also take more time to develop and if several are required, this time can be considerable.


You can also use PicoBlaze for serial communication control over RS232, I2C and SPI. In fact, anything that you would use a typical 8-bit micro for can be implemented within a PicoBlaze, with the upside of higher performance. Engineers have used PicoBlaze to implement PID controllers in control systems. They have used it with I2C, SPI or parallel DACs to create reference waveforms that range from simple square, sawtooth and triangular to more complicated sine/cosine waveforms (using the shift-and-add CORDIC algorithm).


Instantiating a PicoBlaze microcontroller within your FPGA to implement these sequential functions can result in a faster development time and allow for simplified modifications later in the development life cycle. And of course, being a soft core, PicoBlaze also helps address obsolescence issues and it encourages design reuse as ASM modules are developed.


Note: This article was adapted from and is a much shortened version of “Getting the Most out of Your PicoBlaze Microcontroller” in Xcell Daily, issue 89. For details in adding PicoBlaze processors to your FPGA and Zynq SoC designs, see the full article in Xcell Daily.



Click here for the PDF download of Xcell Journal Issue 89.



Click here to read Xcell Journal Issue 89 online.



About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.