We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

See DisplayPort 1.4, SMPTE-2110, and low-latency 4K HEVC video streaming at Xilinx’s ISE booth—next month in Amsterdam

by Xilinx Employee on ‎01-18-2018 10:20 AM (16,362 Views)


The ISE 2018 show for Pro A/V and Broadcast equipment users and designers opens in Amsterdam in about three weeks and Xilinx will be showing several Pro A/V and broadcast technologies in its booth (#15-K222) including three all-new ones:



  • DisplayPort 1.4: With 8K cameras and display panels already beginning to appear, Pro AV system designers can now design products based on Xilinx UltraScale and UltraScale+ devices with 16.3Gbps GTH SerDes ports that can ingest 8K video for subsequent processing, compression, and transport.


  • SMPTE-2110: Macnica Technology will be demonstrating the SMPTE-2110 broadcast standard for media-over-IP transport running on its VIPA Professional PCIe Video Transport Interface card, which is based on a Xilinx Kintex UltraScale KU035 FPGA. With a mezzanine codec like intoPIX’s TICO, you can pipe 4K60 video through a standard 10G Ethernet pipe—which is great for designers of high-end video projectors, KVMs, media gateways, and video-over-IP boxes.



Macnica VIPA Professional PCIe Video Transport Interface Card.jpg 



Macnica Technology’s VIPA Professional PCIe Video Transport Interface Card can implement SMPTE-2110 and TICO

for 4K60 video transmission over 10GbE




  • 4K, low-latency (60msec glass-to-glass) HEVC video streaming running on a Zynq UltraScale+ MPSoC, useful for designing video-conferencing systems and KVMs.



You’ll also see Omnitek demonstrating its 4K-video warping and stitching subsystem IP running on a Xilinx ZCU106 eval kit. On the ZCU106’s Zynq UltraScale+ MPSoC, the warping subsystem can create real-time image warps on video streams with images as large as 4096x2160 pixels at 60fps and the image-stitching subsystem can stitch as many as eight video streams into one 4K/UHD stream in real time.

About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.