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The Zynq PS/PL, Part Two: Adam Taylor’s MicroZed Chronicles Part 22

by Xilinx Employee ‎03-03-2014 03:18 PM - edited ‎03-04-2014 06:17 AM (142,959 Views)

By Adam Taylor


Having introduced the Zynq SoC’s AXI interfaces in my last blog, we’ll now use an AXI interface to create a peripheral in the Zynq SoC’s programmable-logic fabric. The first step is to open the Vivado design and select the “create and package IP” option from under the tools option. Note I am using Vivado 2013.4 for this blog.



Figure 1.jpg 



This will open a dialog box that allows you to create AXI4 peripherals. The first real page of the dialog presents a number of options to either create a new IP block or to convert your current design or a directory into an IP module.



Figure 2.jpg



Select the “Create new AXI4 peripheral” option and point it to a predefined IP location. You can create a new IP location using the Manage IP section on the Vivado home page.



Figure 3.jpg



The dialog then allows you to enter the library, name, description, and company URL that you wish to use for the new peripheral. For this very simple example, which I will expand upon later, I have named it Adams_peripheral and pointed the URL back to Xcell Daily blog.



Figure 4.jpg 



The dialog box that follows is the powerful one where we can define the type of AXI4 interface we wish to specify:


  • Master or Slave
  • Interface type – Lite, Streaming, or Burst
  • Bus width 32 or 64 bit
  • Memory size
  • Number of Registers


This initial example is going to be very simple just so that I can demonstrate the flow needed to create the peripheral, implement it within Vivado, and then export it to the SDK. For this reason I’ll use an AXI4-L ite interface with just four registers that we can then address using software. These registers could be used to control the operation of functions within the Programmable logic side of the design.



 Figure 5.jpg



The final “create peripheral” dialog allows you to select an option to generate driver files for the new peripheral. This is an important step because it will make using the peripheral with SDK much simpler.



Figure 6.jpg



Once the “Create Peripheral” wizard is closed, you can open the created VHDL file and add your custom hardware design to perform the function you desire in the PL. I won’t do that for this simple example.  I will just use the four registers we created and therefore can leave the files unedited.


Having created the perihperal, we want to connect and use it within the Vivado design. Doing this is very simple. We open the system block diagram and select the Add IP option from the left-hand menu. You should be able to find the peripheral created in this menu. The available peripherals are listed alphabetically.



Figure 7.jpg




Drag this IP block into the design and then connect it to the AXI GP bus. Vivado helpfully offers design assistance to connect the new peripheral automatically. You can see this assistance in the green bar that appears across the top of the image below where Vivado is offering to run the connection automation tool.  Running the tool quickly results in a design we can implement.



Figure 8.jpg



You can modify the peripheral’s address range by clicking on the address editor tab. Note the 4k address space is the smallest allowable, which is overly generous for our 4-register example. Fortunately, the ARM Cortex-A9 MPCore processors in the Zynq SoC have a lot of address space.



Figure 9.jpg 


Once Vivado has automatically inserted the connections, as shown in the diagram below, we are ready to implement the design and export it to SDK. We can then start to make use of our peripheral.




Figure 10.jpg



Once implemented, you can check the implementation reports to ensure the inclusion of the peripheral created.


In the next instalment we will look at how we can use this new peripheral within SDK before we explore more complicated AXI4 interfaces and more complex uses for the ability to add peripherals and accelerators to the Zynq SoC’s Processor System using the Zynq’s programmable logic.




Please see the previous entries in this MicroZed series by Adam Taylor:


The Zynq PS/PL, Part One: Adam Taylor’s MicroZed Chronicles Part 21


Introduction to the Zynq Triple Timer Counter Part Four: Adam Taylor’s MicroZed Chronicles Part 20


Introduction to the Zynq Triple Timer Counter Part Three: Adam Taylor’s MicroZed Chronicles Part 19


Introduction to the Zynq Triple Timer Counter Part Two: Adam Taylor’s MicroZed Chronicles Part 18


Introduction to the Zynq Triple Timer Counter Part One: Adam Taylor’s MicroZed Chronicles Part 17


The Zynq SoC’s Private Watchdog: Adam Taylor’s MicroZed Chronicles Part 16


Implementing the Zynq SoC’s Private Timer: Adam Taylor’s MicroZed Chronicles Part 15


MicroZed Timers, Clocks and Watchdogs: Adam Taylor’s MicroZed Chronicles Part 14


More About MicroZed Interrupts: Adam Taylor’s MicroZed Chronicles Part 13


MicroZed Interrupts: Adam Taylor’s MicroZed Chronicles Part 12


Using the MicroZed Button for Input: Adam Taylor’s MicroZed Chronicles Part 11


Driving the Zynq SoC's GPIO: Adam Taylor’s MicroZed Chronicles Part 10


Meet the Zynq MIO: Adam Taylor’s MicroZed Chronicles Part 9


MicroZed XADC Software: Adam Taylor’s MicroZed Chronicles Part 8


Getting the XADC Running on the MicroZed: Adam Taylor’s MicroZed Chronicles Part 7


A Boot Loader for MicroZed. Adam Taylor’s MicroZed Chronicles, Part 6 


Figuring out the MicroZed Boot Loader – Adam Taylor’s MicroZed Chronicles, Part 5


Running your programs on the MicroZed – Adam Taylor’s MicroZed Chronicles, Part 4


Zynq and MicroZed say “Hello World”-- Adam Taylor’s MicroZed Chronicles, Part 3


Adam Taylor’s MicroZed Chronicles: Setting the SW Scene


Bringing up the Avnet MicroZed with Vivado




by Explorer
on ‎07-12-2014 11:38 AM



i have a similar design, when i add the XADC bloc, it' seem that all output pin, still unconnected ?


my goal is to read the alarm of the temperature on led, 


my question, it's necessary to connect the Alarm output to an external port, ?



by Observer taylo_ap
on ‎07-15-2014 12:38 PM



You need to ensure you have connected the XADC correcty part 7 of this blog may be of help


Getting the XADC Running on the MicroZed: Adam Taylor’s MicroZed Chronicles Part 7


At the moment you have not connected the external VP/VN signals to sample an external signal. If you are using the alarm there is a XADC shared interrupt which can be used on IRQ 39. 


the Zynq TRM UG585 prvides good information on this, you can use the xadcpc.h to control the XADC and configure and set up the interrupts. Check out the system.mss file under the BSP for examples which should point you in th right direction.


I think this will make a good additional blog, which I will try to do in the near future 



by Explorer
on ‎07-20-2014 11:05 AM

hi Adam


thank you for your help Smiley Wink






by Explorer
on ‎07-20-2014 11:27 AM



yes, i checked the connection it's ok, no problem 


you mean, if i don't connect any outout pin of XADC, i can read those value from statut register  , because i have a light Os, and i need to detect problem on board, like temperature over , etc 


any suggestion, i will be apraciate 


thank you Adam Smiley Happy

by Observer taylo_ap
on ‎07-21-2014 11:35 AM



You are correct if you do not use the XADC analogue inputs, you can still read the status of the internal voltages and temperature. 


In fact you should use these as part of the validattion of your system as it can prove very useful 



About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.