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VadaTech VT988 high-speed data-acquisition system matches sixteen 3Gsamples/sec ADCs with Kintex-7 FPGA and Nvidia TX2

by Xilinx Employee on ‎08-09-2017 02:47 PM (2,474 Views)

 

VadaTech’s new high-speed data-acquisition system with 16 8-bit, 3Gsamplses/sec ADCs has a unique architecture I’ve not seen before. It pairs a Xilinx Kintex-7 FPGA with an Nvidia Jetson TX2 SOM. At first, I was confused by the block diagram:

 

 

VadaTech VT988 16-Channel Data-Acquisition System.jpg

 

VadaTech high-speed, 16-channel data-acquisition system block diagram

 

 

 

Obviously, the Kintex-7 485T FPGA is needed to interface to the high-speed ADCs. It’s the ideal device for that task with flexible, high-speed I/O and its processing power is available for real-time filtering and DDC (digital down-conversion). But where’s the memory for storing the samples? The FPGA is also tied directly to the board’s two 10GbE SFP+ interfaces and to the board’s four GbE ports through the on-board GbE switch, but even that huge amount of Ethernet throughput is not enough to funnel the data from all of the ADCs running at full speed. There has to be local storage, especially if you’re going to process the acquired data on board.

 

And there is.

 

The answer is that the Nvidia Jetson TX2 SOM has 8Gbytes of LPDDR4 SDRAM on the module, which the Kintex-7 FPGA can access through the PCIe Gen 2 x4 interface it has to the TX2. It’s an interesting system architecture.

 

The VadaTech VT988 is a 1U, 19-inch rack module and each of the sixteen ADCs connect to the outside world through its own SMC connector. Here’s a photo of the module’s front panel:

 

 

VadaTech VT988 16-Channel Data-Acquisition System Front Panel.jpg 

 

 

For more information about the VT988 high-speed data-acquisition system, please contact VadaTech directly.

 

 

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About the Author
  • Be sure to join the Xilinx LinkedIn group to get an update for every new Xcell Daily post! ******************** Steve Leibson is the Director of Strategic Marketing and Business Planning at Xilinx. He started as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He's served as Editor in Chief of EDN Magazine, Embedded Developers Journal, and Microprocessor Report. He has extensive experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.