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Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

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Visitor
Posts: 6
Registered: ‎06-27-2014
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Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

QUESTION  1:  How do I configure the Zynq ZC706 FPGA to support 1.8V and 3.3V PL I/Os at the same time?  Is this possible?

QUESTION 2:  Is it ok to program VADJ_FPGA for 1.8V?  (default = 2.5V)

 

I have the Zync ZC706 Evaluation Board.  I have a full-up working design that I have reconfigured the VADJ_FPGA voltage for 3.3V, 2.5V, and recently for 1.8V (QUESTION 2).  I have configured the I/Os for LVCMOS18 and LVCMOS33.  I see that as I change VADJ_FPGA the I/O voltage changes.  I am wondering is there a configuration that allows me to configure VADJ_FPGA for 3.3V and the I/Os for 1.8V or 3.3V.  (Alternative would be VADJ_FPGA for 1.8V and I/Os for 1.8V or 3.3V).

 

Note:  My understanding is that all the I/Os on one BANK must have the same power level, but I should be able to configure BANK 10 for 3.3V and BANK 12 for 1.8V.  


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Moderator
Posts: 1,258
Registered: ‎07-23-2015

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

@emara


 

So, I have two more follow-up questions.

1. Can the ZC706 board be modified so that we can power each of these banks by their own VADJ_FPGA power supply? 

2. Where can I get the Gerber or *.BRD files for the ZC706 to help evaluate feasibility?   


1. I don't think there is an option since the VADJ_FPGA plane is connected directly to VCCO of the Banks (not through a resistor). You can check the .brd file though. 

 

2. https://www.xilinx.com/member/forms/download/design-license.html?cid=396441&filename=zc706-allegro-board-source-rdf0204.zip

https://www.xilinx.com/member/forms/download/design-license.html?cid=396442&filename=zc706-gerber-files-rdf0206.zip

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Scholar
Posts: 2,187
Registered: ‎04-26-2015

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

(1) As far as I can tell, you can't do this. All the PL banks (except for the ones that are hard-wired to components on the board) are connected to VADJ, so you can only use one voltage.

 

(2) Should be fine. The manual frequently talks about setting it to 1.8V or 3.3V, which implies that they expect users to do this. Obviously if you've got an FMC card that's expecting 2.5V then it might be rather unhappy.

Moderator
Posts: 141
Registered: ‎04-12-2017

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

Hello @emara,

 

QUESTION  1:  How do I configure the Zynq ZC706 FPGA to support 1.8V and 3.3V PL I/Os at the same time?  Is this possible?

Ans: If you are looking for doing this in same bank its not possible. because voltage ratings are not similar.

You can read about the rules for combining  I/O Standards in the Same Bank on page number 97 of UG471.

 

 

QUESTION 2:  Is it ok to program VADJ_FPGA for 1.8V?  (default = 2.5V)

Ans: Yes, you can reprogram the onboard TI power controller to set for 1.8V on VADJ supply lane.

You have to right a script to reprogram the power controller. You will also require TI power module and GUI for this operation.

Please follow below links for further help:

https://www.xilinx.com/Attachment/ZC706_Power_Controllers_Reprogramming_Steps.pdf

https://www.xilinx.com/support/answers/56811.html

 

Hope this helps.

Thank you.

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Visitor
Posts: 6
Registered: ‎06-27-2014

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

Thank you for the quick feedback.

(1)  yes.  that is my understanding as well.  However, I was hoping that there may be some way to either use the external VREF or AUX supplies to configure I/Os for 1.8V on a Bank with Vcco = 3.3V.  Seems like this is a fishing expedition that will need to be resolved with external level-shifters.  Thanks again!!

 

(2)Yes.  The documents refer in multiple places that the TI part can be configured to generate 1.8V.  And the FPGA is capable of operating at 1.8V.  However, we are noticing odd behavior on the fan when configured for 1.8V.  Bank 9 is also connected to VADJ_FPGA and it has the PWM and TACH signals to the onboard fan.  This is easily resolved to hardwire fan always on, but I was wondering what other issues may be lurking at 1.8V.  (Also, I thought i had seen a warning about VADJ = 1.8V in a document, but I cannot find this note again.  Was hoping someone else might have seen it.)

 

By the way, I am a newbie to this forum and really happy to see the quick feedback. 

 

Visitor
Posts: 6
Registered: ‎06-27-2014

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

Hi.  Thanks for the quick response.

(1)  I am not trying to support 1.8V and 3.3V in the same bank.  i am trying to configure 2 different banks at different voltages fo PL I/Os.  For example: Bank 10 at 1.8V and Bank 12 at 3.3V.  Do you know if this is possible?

 

(2)  Agreed and I have successfully reprogrammed the TI power controller for 1.8V, 2.5V, and 3.3V.  However, I am noticing that the board fan spins up to max speed and immediately shuts off when configured for 1.8V.  The Fan is controlled by signals on Bank 9, which has a Vcco = VADJ_FPGA.  i am wondering if I can set VADJ = 3.3V and then use either a constraint or external reference to generate 1.8V I/Os.

 

Thank you for the feedback.

Eileen 

Moderator
Posts: 141
Registered: ‎04-12-2017

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

Hello @emara,

 

Q1. Ans. Yes that is possible. Your understanding is correct.

 

Q2. Ans. You can expect such behavior. Fan must be working on higher voltage ratings.

Maybe using a constraint you cannot achieve the levels of 1.8V from 3.3V.

You can use electrical standards as per bank voltage selected. You can read about the rules UG471.

 

Hope this helps.

Thank you.

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Visitor
Posts: 6
Registered: ‎06-27-2014

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

Q1. If the answer is yes, it is possible then can you tell me how to do it?  I have tried multiple experiments and all have failed.

 

I followed your advice and revisited UG471.  

- According to UG471,  "All VCCO pins for a given I/O bank must be connected to the same external voltage supply on the board, and as a result all of the I/O within a given I/O bank must share the same VCCO level. The VCCO voltage must match the requirements for the I/O standards that have been assigned to the I/O bank."

- According to the ZC706 schematic, Banks 9, 10, 11, 12, and 13 are all powered by VADJ_FPGA.  How can I power them by different VCCO level?

 

Q2.  Thank you.

 

Q3. If the answer is no to Q1 and it is not possible to support 1.8V and 3.3V at the same time, then can you tell me if it is better to operate the Zync ZC706 board at 1.8V or 3.3V.  The default was 2.5V.  I have seen no issue at 3.3V yet.  I have seen the issue with the fan at 1.8V.

 

Thank you again for your assistance.

 

 

Scholar
Posts: 2,187
Registered: ‎04-26-2015

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

I think that @kvasantr may be answering a slightly different question to what @emara is asking.

 

On the Zynq 7000 you can have two different I/O voltages by supplying each bank from a different regulator.

 

However, on the ZC706 specifically, you cannot do this because all the user-accessible PL banks are powered from the same regulator.

Xilinx Employee
Posts: 16
Registered: ‎01-10-2012

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

@emara Is all your queries answered, If NOT, let me summarize answers to your Q1-Q3 from last post.

 

A1. No, on ZC706 The IO banks have a common supply hence you cant change the Voltage for the individual bank.

       However if you are designing your own board and design your power rail such that each IO bank has separate Power rail, you

       can individually control them as required. However note that dynamic change of IO voltage while the device is in operation is not

       recommended, you can decide and set the voltage of the IO bank when you power ON the device.

 

A2. Looks its already answered and you understand the response.

 

A3. On the Fan not getting switched ON when at 1.8V for ZC706, Refer to UG954 its a known limitation of the circuit design.

     

UG954:

--

When VADJ is modified from a default of 2.5V to 1.8V or a lower VADJ setting, the AP SoC U1 cooling fan turns off. Transistor Q1 is used to switch on the fan and has a max VGS of 2V, hence the fan is not guaranteed to work at 1.8V or lower VADJ, setting

--

 

Visitor
Posts: 6
Registered: ‎06-27-2014

Re: Configure Zynq 7000 PL I/Os for both 1.8V and 3.3V

Thanks for your response.  

Yes, I think my original queries have been answered. 

However, I have 2 more follow-up questions at the end of this post related to QUESTION 1.

 

QUESTION  1:  How do I configure the Zynq ZC706 FPGA to support 1.8V and 3.3V PL I/Os at the same time?  Is this possible?

ANS>> I cannot configure the board to support 1.8V and 3.3V at the same time.  It is not possible with the ZC706 board design.  

 

QUESTION 2:  Is it ok to program VADJ_FPGA for 1.8V?  (default = 2.5V)

ANS>> Yes, it is possible to program VADJ_FPGA to 1.8V. 

Note:  I found the files to configure the board for 1.8V, 2.5V and 3.3V under Xilinx Boards and Kits "ZC706 Doesn't work with VADJ at 1.8v."  The zc706_rev_0_xml_power_script_r11_with_alternates.zip has all 3 configurations.  Fan seems to be operating correctly when I use this script to configure 1.8V.  Have not validated all functions are operating as intended yet, however, it looks like all should be fine.  (attached zip to this post)

 

So, I have two more follow-up questions.

1. Can the ZC706 board be modified so that we can power each of these banks by their own VADJ_FPGA power supply? 

2. Where can I get the Gerber or *.BRD files for the ZC706 to help evaluate feasibility?