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ZC702 PL fabric clock issue

Visitor
Posts: 3
Registered: ‎03-27-2017

ZC702 PL fabric clock issue

I'm using the ZC702 evaluation board.

 

I configured the 100MHz clock for FCLK_CLK0 from PS to PL, and I measured the clock frequency by exporting to a external pin.

 

But the frequency is measured as 50MHz.

 

Is there anyone who can solve it?

Moderator
Posts: 1,525
Registered: ‎01-16-2013

Re: ZC702 PL fabric clock issue

Hi,

Can you share the details of clocking topology you have used in your design?

Thanks,
Yash
Visitor
Posts: 3
Registered: ‎03-27-2017

Re: ZC702 PL fabric clock issue

Hi yashp,

 

Do you want to know the following information?

 

Thank you.

 

캡처.JPG

Xilinx Employee
Xilinx Employee
Posts: 119
Registered: ‎08-02-2007

Re: ZC702 PL fabric clock issue

It looks like your processing system was not getting initialized, therefore the default clock was output

Onto the pin.

 

After you exported to SDK, and download the bitstream, You need to download the application (run as/debug as). In doing so, this will initialize the PS with the ps7_init.tcl file.