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Participant
Participant
15,238 Views
Registered: ‎09-21-2007

ADC and DAC interface in Spartan 3E starter kit

Hi,
             I want to design digital filter for audio signals......... For that I need ADC and DAC interface with Spartan 3e. Actually I get the verilog code for DAC. It works nicely but when I open in system generator using black box it not works, but it needed because I am going to design a filter in sys gen. One more thing in verilog top module what is meaning of 'udc', 'ulc',' usdo'. Even I get the document in which
ADC and DAC interface is done using Picoblaze........But I want without it..................So please if any one has the code for interfaceing of ADC and DAC for spartan 3d startkit please help me or please give me it's link...................
 
Thank you,
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Newbie
Newbie
15,085 Views
Registered: ‎02-19-2008

My new text has what you are looking for and more.  See astro.temple.edu/~silage/embeddes.htm
 
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Participant
Participant
15,037 Views
Registered: ‎09-21-2007

Thank you for your reply.
 
The link you have open is seems very useful........But the download link given on that page is not opening in any of my college computer it shows there is no page........so please if any other link is there please send me
 
Thank you again,
Krunal
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Adventurer
Adventurer
15,018 Views
Registered: ‎12-29-2007

I would find a generic Opensource SPI core to start from, and then use the very nice Picoblaze reference designs as specifications for the details of the state machines for the devices and for the exact pin-outs and external signals. Do pay special attention to exactly how to disable the SPI (and other) devices that you don't want to use There are a total of six devices, and you must have at most one of them enabled at any given time.

Go ahead and actually implement the Picoblaze reference designs first to satisfy yourself that they actually work (I intend to do this tomorrow as part of my project.)  This is important because the reference designs do not match the Spartan 3E Starter Kit User's guide's documentation on how to disable the Platform Flash.
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Newbie
Newbie
8,114 Views
Registered: ‎05-19-2010

would you tel me pls the 6 spi devices you mention, so far I've disabled these:

 

Signal                   Disabled Device                          Disable Value
SPI_SS_B           SPI Serial Flash                                   1
AMP_CS              Programmable Pre-Amplifier            1
DAC_CS             DAC                                                         1
SF_CE0              StrataFlash Parallel Flash PROM      1
FPGA_INIT_B    Platform Flash PROM                          0

 

of course the amp and the adc are controlled by the fsm I made

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Historian
Historian
8,099 Views
Registered: ‎02-25-2008

 


@krunal_h_bhavsar wrote:
Thank you for your reply.
 
The link you have open is seems very useful........But the download link given on that page is not opening in any of my college computer it shows there is no page........so please if any other link is there please send me
 
Thank you again,
Krunal

The ADC and the DAC have SPI interfaces, which are nothing more than a synchronous shift register and a chip select. This sort of thing is ridiculously easy to design in an FPGA, and I would imagine that if you can't design this then you have no business doing anything else in an FPGA. Harsh? Yes. But welcome to the real world, kid.

 

----------------------------Yes, I do this for a living.
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