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suzzycide
Visitor
Visitor
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Registered: ‎04-05-2017

ATLYS AXI HDMI Output and a student in distress...

Hi everyone, I am rather new here (a premature appology if I do something extremely stupid while I am here) but since I will be studying FPGAs next semester (and from year 2 on) at the university, I decided it would be good to start on my own in my free time. I bought a second hand Digilent Atlys board (according to forum comments and my teachers it is one of the nicer ones to begin with) and I decided to start a small project with an HDMI out and to have it printed out on an LCD screen I have around. We shall be working on XPS mostly in the beginning

I am following some instructions set by my tutors and they said in order to have a sense of what we are to do is that we have to the following 3 steps(with some addition information on what I did as it might be wrong):


1. Set up an UART communication with the device and have a string (while(1) xil_printf"Hello Atlys"; etc) returned to you. (DONE)
- Was super simple to do. Had a bit of problems with the Auto Detect setting but setting it to Digilent Cable seemed to fix it

 

2. Set up an AXI HDMI out. (STUCK ON)

- Added the HDMI OUT ipcore from the Atlys Demo HDMI project.

- I think I have to set the DDR2 somehow but I do not have any idea what to do.

- I did set a TPG (Test Pattern Generator)


3. Have the (while(1) xil_printf"Hello Atlys"; etc) being printed on the screen. (HAVENT EVEN ATTEMPTED AND I AM GETTING REALLY DEPRESSED ABOUT IT)

- Am close to having a Citalopram overdose (I'm trying to be humorous here....)

 

Well this is pretty much it. If you guys need me to upload my project so far I can upload it, but I mostly need instructions on what to do. 

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u4223374
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Registered: ‎04-26-2015

When you set up the TPG with the HDMI core, was that working? So you could display test patterns on the screen, and the only problem is getting the HDMI core talking to the RAM? Or do you not have anything from the HDMI core yet?

 

If the problem is just getting the RAM working, the Atlys "Flash Memory Config" project might provide some valuable hints. That apparently connects the DDR2 RAM, presumably using a MIG (Memory Interface Generator) or something similar. I haven't used external memory in ISE, but in the newer tools (Vivado) you can just put an AXI port on the MIG, wire that up to the HDMI IP (possibly with a VDMA block in the middle, if the HDMI IP expects a stream) and start feeding in some data.

suzzycide
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Visitor
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Registered: ‎04-05-2017

No, I get some errors. I will take a screencap of everything so you could see what is happening...
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suzzycide
Visitor
Visitor
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Registered: ‎04-05-2017

I am still trying to set the HDMI to display something on the screen I have....
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suzzycide
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Registered: ‎04-05-2017

It took me sometime to get everything together but here it is:
1.png2.png3.png

 

I am attaching a .rar file with all of the stuff you guy may need.

Thank you lot, so much!!! I really do appreciate your time and patience with me!!! :)

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u4223374
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Registered: ‎04-26-2015

Hmm, that's going to need someone who actually knows their way around XPS and/or the HDMI design (ie not me).

 

Is there a "locked" input to the HDMI core, to tell it that the clock is stable? If there is, you might need to connect that to the "locked" output on whatever is providing the clock.

suzzycide
Visitor
Visitor
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Registered: ‎04-05-2017

Thank you for the reply!

The HDMI Out core is pretty "simplistic" to put it eloquently...

I will list here everything it has down bellow.

IN:

PXLCLK_I
PXLCLK_2X_I
PXLCLK_10X_I
LOCKED_I
VFBC_OUT
VFBC_CMD_CLK
VFBC_CMD_RESET
VFBC_CMD_DATA[31:0]
VFBC_CMD_WRITE
VFBC_CMD_END
VFBC_CMD_FULL
VFBC_CMD_ALMOST_FULL
VFBC_CMD_IDLE
VFBC_RD_CLK
VFBC_RD_RESET
VFBC_RD_READ
VFBC_RD_END_BURST
VFBC_RD_FLUSH
VFBC_RD_DATA[15:0]
VFBC_RD_EMPTY
VFBC_RD_ALMOST_EMPTY

OUT:
TMDS[3:0]
TMDSB[3:0]

And that is it. I really have no idea how to use it to be honest and I feel really confused about all of this. Does anyone have any clue what to do?

Thank you in advance!
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u4223374
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Registered: ‎04-26-2015

Right, that looks logical. Where are PXLCLK_I, PXLCLK_2X_I, PXLCLK_10X_I, and LOCKED_I connected? Presumably there's a clock generator somewhere that's producing those, and ideally it should have a "locked" output pin.

suzzycide
Visitor
Visitor
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Registered: ‎04-05-2017

I do not have anything that I can connect to them. What should I use for them, as I know that I cant use just any clock generator?

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