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Registered: ‎06-04-2019

Block memory generator as Standalone ROM unpredicted behavior

Hello all,

I am designing a custom IP which generates addresses for the block RAM to decode the initialized values. addressdecoder1.PNG

I am not using any AXI BRAM controller. Block memory generator is configured with Mode = "Stand Alone", Memory Type = "Single Port ROM". The single port "PORT A" is connected to the custom ip "axi_addressdecoder_v1.0" as seen in the screenshot.

The ROM is initialized with a .coe file. Now I am trying to read the contents of the ROM using my custom IP.



My questions/doubts are,

  1. "en" input to the block memory generator is never "1", however I am seeing an output "dout" as 11111111 which is stored at the address 0x00000000. Why? I did a little debugging and I found there is some signal "ENA" inside native_mem_mapped scope (as in the screenshot attached) which goes "1" at some time which may be a reason for the output. But why? from where this signal is coming?
  2. This unexpected output comes after three latency cycles delay. I researched the forums and also the documents to understand the reading delay. My primitive output registers are disabled, but still it takes three latency cycles. Why?

Any inputs are appreciated. Thanks!





Bhavanithya Thiraviaraja
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