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Visitor mtde
Visitor
336 Views
Registered: ‎06-22-2018

Can't Capture correct data from ADC's serial LVDS output using High Speed Select I/O

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Currently, we are bringing up a new board with AD9653+Xilinx ZYNQ Ultrascale+. We can’t capture correct data from AD9653 serial LVDS. 

Problem description:

Bit clock @ 400MHz: We can get correct data both in test pattern mode and normal working mode.

Bit clock @1GHz: We captured an unexpected 1 bit or 9 bits data when switched from test pattern mode to normal working mode.

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Xilinx Employee
Xilinx Employee
266 Views
Registered: ‎06-21-2018

Re: Can't Capture correct data from ADC's serial LVDS output using High Speed Select I/O

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I'm glad to hear you're up and running! Please mark your Solution as Accepted, to benefit other users.

Thanks for the update!

Andres

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3 Replies
Xilinx Employee
Xilinx Employee
292 Views
Registered: ‎06-21-2018

Re: Can't Capture correct data from ADC's serial LVDS output using High Speed Select I/O

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Hi mtde,

Which Xilinx Evaluation Board are you using? 

How are you connecting the ADC to the Xilinx Eval Board?

Thanks,
Andres

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Visitor mtde
Visitor
280 Views
Registered: ‎06-22-2018

Re: Can't Capture correct data from ADC's serial LVDS output using High Speed Select I/O

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Hi Andres, Thanks for your support. We connected the ADC board to Xilinx ZYNQ Ultrascale+ Eval board by FMC connector. This issue has been solved when we changed MSB first to LSB first. Sincerely, LB Shi
Xilinx Employee
Xilinx Employee
267 Views
Registered: ‎06-21-2018

Re: Can't Capture correct data from ADC's serial LVDS output using High Speed Select I/O

Jump to solution

I'm glad to hear you're up and running! Please mark your Solution as Accepted, to benefit other users.

Thanks for the update!

Andres

View solution in original post

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